__IO uint16_t ForDAC2Value = 0;

void DAC_Config(void)
{
DAC_InitTypeDef DAC_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;

/* Enable DAC2, DMA1 and GPIO clocks ****************************************/
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1 | RCC_AHB1Periph_GPIOA, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE);

/* Configure DAC2 pin as analog input ***************************************/
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOA, &GPIO_InitStructure);

/* DMA1 Stream6 channel7 configuration **************************************/

DMA_InitStructure.DMA_Channel = DMA_Channel_7;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&(DAC->DHR12R2);
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&ForDAC2Value;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_BufferSize = 1;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Disable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA1_Stream6, &DMA_InitStructure);
DMA_Cmd(DMA1_Stream6, ENABLE);

// конфигурируем ЦАП
DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None;
DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Disable;
DAC_Init(DAC_Channel_2, &DAC_InitStructure);

/* Enable DAC */
DAC_Cmd(DAC_Channel_2, ENABLE);

DAC_DMACmd(DAC_Channel_2, ENABLE);
}

#define DAC_DHR12R2_ADDRESS 0x40007414
const uint16_t Sine12bit[32] = {
2047, 2447, 2831, 3185, 3498, 3750, 3939, 4056, 4095, 4056,
3939, 3750, 3495, 3185, 2831, 2447, 2047, 1647, 1263, 909,
599, 344, 155, 38, 0, 38, 155, 344, 599, 909, 1263, 1647};

void DAC_Config(void)
{
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
DAC_InitTypeDef DAC_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
// NVIC_InitTypeDef NVIC_InitStructure;

/* Enable DAC reset state */
RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, ENABLE);
/* Release DAC from reset state */
RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, DISABLE);

/* Enable DAC2, DMA1 and GPIO clocks ****************************************/
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1 | RCC_AHB1Periph_GPIOA, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC | RCC_APB1Periph_TIM6, ENABLE);

/* Configure DAC2 pin as analog input ***************************************/
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOA, &GPIO_InitStructure);

/* Time base configuration */
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.TIM_Period = 0xFF;
TIM_TimeBaseStructure.TIM_Prescaler = 0;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM6, &TIM_TimeBaseStructure);

/* TIM6 TRGO selection */
TIM_SelectOutputTrigger(TIM6, TIM_TRGOSource_Update);

/* TIM6 enable counter */
TIM_Cmd(TIM6, ENABLE);

/* DAC channel2 Configuration */
DAC_InitStructure.DAC_Trigger = DAC_Trigger_T6_TRGO;
DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None;
DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
DAC_Init(DAC_Channel_2, &DAC_InitStructure);

/* DMA1_Stream5 channel7 configuration **************************************/
DMA_DeInit(DMA1_Stream5);
DMA_InitStructure.DMA_Channel = DMA_Channel_7;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)DAC_DHR12R2_ADDRESS;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&Sine12bit;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_BufferSize = 32;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA1_Stream5, &DMA_InitStructure);

/* Enable DMA1_Stream5 */
DMA_Cmd(DMA1_Stream5, ENABLE);

/* Enable DAC Channel2 */
DAC_Cmd(DAC_Channel_2, ENABLE);

/* Enable DMA for DAC Channel2 */
DAC_DMACmd(DAC_Channel_2, ENABLE);

}

enum DacWaveform
{
    dwNone      = 0,
    dwNoise     = DAC_CR_WAVE1_0,
    dwTriangle  = DAC_CR_WAVE1_1
};

void InitDacGenerator(DacWaveform wave)
{
    Pin<'A', 4>::Mode(ANALOGINPUT);
    Pin<'A', 5>::Mode(ANALOGINPUT);

    TIM6->CR1 &= ~TIM_CR1_CEN;       // stop timer
    DAC->CR &= ~DAC_CR_EN1;          // DAC disable

    RCC->APB1ENR |= RCC_APB1ENR_DACEN;

    DAC->CR =
            DAC_CR_BOFF1       |    // disable output buffer
            DAC_CR_MAMP1       |    // max amplitude
            wave               |    // noise/triangle generator
            DAC_CR_TEN1       ;    // trigger enable

    DAC->CR |= DAC_CR_EN1;          // DAC enable

    // TIM6
    RCC->APB1ENR |= RCC_APB1ENR_TIM6EN;
    TIM6->PSC = 0x0000;             // prescaler
    TIM6->ARR = 0xF;               // period

    TIM6->CR2 |= TIM_CR2_MMS_1;     // MMS = 010 : update event is selected as a trigger output (TRGO)
    TIM6->CR1 |= TIM_CR1_CEN;       // run timer
}

    Pin<'A', 4>::Mode(ANALOGINPUT);
    Pin<'A', 5>::Mode(ANALOGINPUT);

    // init timer:
    RCC->APB1ENR |= RCC_APB1ENR_TIM6EN;
    TIM2->CR1 = 0;                  // count up, no divisor
    TIM6->PSC = timer_prescaler;    // prescaler
    TIM6->ARR = timer_period;       // period
    TIM6->CR2 |= TIM_CR2_MMS_1;     // MMS = 010 : update event is selected as a trigger output (TRGO)

    // init DAC:
    DAC->CR &= ~DAC_CR_EN1;         // DAC disable
    RCC->APB1ENR |= RCC_APB1ENR_DACEN;
    DAC->CR = 0
            | DAC_CR_BOFF1          // disable output buffer
            | DAC_CR_TEN1           // trigger enable
        ;


    RCC->AHBENR |= RCC_AHBENR_DMA2EN;

    // configure DMA channel
    DMA2_Channel3->CCR = 0
            | DMA_CCR1_DIR           // Direction = read from memory
            | DMA_CCR1_CIRC          // Circular mode
            | DMA_CCR1_MINC          // Memory increment mode
            | DMA_CCR1_PSIZE_0       // Peripheral size = halfword
            | DMA_CCR1_MSIZE_0       // Memory size = halfword
            | DMA_CCR1_PL_1          // Channel Priority level
        ;
    DMA2_Channel3->CNDTR = sizeof(sine_table) / sizeof(sine_table[0]);     // count
    DMA2_Channel3->CPAR = (uint32_t)&DAC->DHR12R1;                       // Peripheral address
    DMA2_Channel3->CMAR = (uint32_t)&sine_table;                          // Memory address

    // enable DMA channel.
    DMA2_Channel3->CCR |= DMA_CCR1_EN;

    // enable DAC
    DAC->CR |= DAC_CR_EN1;

    // enable DAC DMA
    DAC->CR |= DAC_CR_DMAEN1;

    // Run timer
    TIM6->CR1 |= TIM_CR1_CEN;