/** @name DAC.CTRLA
  * @{
  */
#define DAC_IDOEN_bm 0x10 ///< Internal Output Enable bit mask
#define DAC_IDOEN_bp 4 ///< Internal Output Enable bit position
#define DAC_CH1EN_bm 0x08 ///< Channel 1 Output Enable bit mask
#define DAC_CH1EN_bp 3 ///< Channel 1 Output Enable bit position
#define DAC_CH0EN_bm 0x04 ///< Channel 0 Output Enable bit mask
#define DAC_CH0EN_bp 2 ///< Channel 0 Output Enable bit position
#define DAC_LPMODE_bm 0x02 ///< Low Power Mode bit mask
#define DAC_LPMODE_bp 1 ///< Low Power Mode bit position
#define DAC_ENABLE_bm 0x01 ///< Enable bit mask
#define DAC_ENABLE_bp 0 ///< Enable bit position
/** @} */