;---------------
;config TIMER A
;---------------
bis #TACLR,&TA0CTL ;reset all presetting
mov.w #0x0110,&TA0CTL ;15-10=0(free);9,8=01(aclk);7,6=11(/8);5,4=01(up to taccr0)
;3=0(free);2=0(TACLR);1=1(прерывание разрешено);0=0(прерывания нет)
mov #0x7fff,&TA0CCR0 ;32768 interval 1c interrupt
bis #CCIE,&TA0CCTL0 ;
mov #0x0000,&TA0CCTL1;
; config TA0 end

собственно прерывание, в котором переключается пин (моргает св.диод)
;===================
; Interrupt Vector
;===================
;------------
;Timer A0
;------------
TA0_CCR0_INT:
bic #0x0001,&TA0CTL
bit.b #0x02,P1OUT
jnz te1
bis.b #0x02,P1OUT
jmp te3
te1:
bic.b #0x02,P1OUT
te3:

reti

TA0_INT:
add.w &TA0IV,PC ; Add Timer_A offset vector
reti ; CCR0 - no source
jmp INT_CCR1 ; Vector 2: TA0CCR1 2
jmp CCIFG_2_HND ; Vector 4: TA0CCR2 2
jmp CCIFG_3_HND ; Vector 6: TA0CCR3 2
jmp CCIFG_4_HND ; Vector 8: TA0CCR4 2
jmp CCIFG_5_HND ; Vector 10: TA0CCR5 2
jmp CCIFG_6_HND ; Vector 12: TA0CCR6 2reti ; jmp INT_CCR2 ; CCR2
TA0_over:
; nop
reti ; Return from overflow ISR bic #0x0001,&TACTL
CCIFG_6_HND: ; Vector 12: TA0CCR6 2
reti ;
CCIFG_5_HND: ; Vector 10: TA0CCR5 2
reti
CCIFG_4_HND: ; Vector 8: TA0CCR4 2
reti
CCIFG_3_HND: ; Vector 6: TA0CCR3 2
reti
CCIFG_2_HND: ;Vector 4: TA0CCR2 2
reti
INT_CCR1:
reti

TA0_INT:
        add.w   &TA0IV,PC               ; Add Timer_A offset vector
        reti                           ; CCR0 - no source
        jmp   INT_CCR1   ; Vector 2: TA0CCR1 2
        jmp   CCIFG_2_HND; Vector 4: TA0CCR2 2
        jmp   CCIFG_3_HND; Vector 6: TA0CCR3 2
        jmp   CCIFG_4_HND; Vector 8: TA0CCR4 2
        jmp   CCIFG_5_HND; Vector 10: TA0CCR5 2
        jmp   CCIFG_6_HND; Vector 12: TA0CCR6 2reti ;            jmp   INT_CCR2  ; CCR2
TA0_over:
      ; nop
        reti                           ; Return from overflow ISR                bic #0x0001,&TACTL
CCIFG_6_HND:; Vector 12: TA0CCR6 2
        reti ;
CCIFG_5_HND:; Vector 10: TA0CCR5 2
        reti
CCIFG_4_HND:; Vector 8: TA0CCR4 2
        reti
CCIFG_3_HND:; Vector 6: TA0CCR3 2
        reti
CCIFG_2_HND:             ;Vector 4: TA0CCR2 2
        reti  
INT_CCR1:
         reti

void Timer_Init (void)
{
   TACCR0=8000;         /* load period register =1 msek */
   TACCTL0=0x10;
   TACTL=0x0110;         /* start Timer_A  up to CCR0,/1,ACLK,*/

__enable_interrupt();
}



#pragma vector=TIMERA0_VECTOR
__interrupt void Timer_A0(void)  // time 1 msec
{


yes_time_1msec=1; //1 msec

cntr_10msec++;
if(cntr_10msec>10)
   { cntr_10msec=0;
     yes_time_10msec=0xff; //10 msec

   }

if(cnt_32msec==0)
{ // time 32 msec
   cnt_32msec=32;
   yes_32msec=1;
}
else cnt_32msec--;

}

void TimerB_Init (void)
{
TBCTL = CNTL_2 | TBSSEL_1 | ID0 | MC1 ;
TBCCR5 = 0x512;
TBCCTL5  =  OUTMOD_3;
TBCCTL5 &=~ CAP;

TBCCR4 = 0x1024;
TBCCTL4  =  OUTMOD_3;
TBCCTL4 &=~ CAP;

TBCTL &=~ TBIFG;

__enable_interrupt();
}