int main()
{
sFLASH_Init();
sFLASH_WriteEnable();
sFLASH_WriteBuffer(bufOutput,1,256);
sFLASH_ReadBuffer(bufInput,1,256);
}

void sFLASH_Init(void)
{
SPI_InitTypeDef SPI_InitStructure;
sFLASH_LowLevel_Init();
/*!< Deselect the FLASH: Chip Select high */
sFLASH_CS_HIGH();
/*!< SPI configuration */
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(sFLASH_SPI, &SPI_InitStructure);
/*!< Enable the sFLASH_SPI */
SPI_Cmd(sFLASH_SPI, ENABLE);
}

void sFLASH_LowLevel_Init(void)
{
GPIO_InitTypeDef GPIO_InitStructure;

/*!< sFLASH_SPI_CS_GPIO, sFLASH_SPI_MOSI_GPIO, sFLASH_SPI_MISO_GPIO
and sFLASH_SPI_SCK_GPIO Periph clock enable */
RCC_APB2PeriphClockCmd(sFLASH_CS_GPIO_CLK | sFLASH_SPI_MOSI_GPIO_CLK | sFLASH_SPI_MISO_GPIO_CLK |
sFLASH_SPI_SCK_GPIO_CLK, ENABLE);
/*!< sFLASH_SPI Periph clock enable */
RCC_APB2PeriphClockCmd(sFLASH_SPI_CLK | RCC_APB2Periph_AFIO, ENABLE);

GPIO_PinRemapConfig(GPIO_Remap_SPI1,ENABLE);
GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE); //выключаем JTAG, SW отстается включенным

/*!< Configure sFLASH_SPI pins: SCK */
GPIO_InitStructure.GPIO_Pin = sFLASH_SPI_SCK_PIN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(sFLASH_SPI_SCK_GPIO_PORT, &GPIO_InitStructure);

/*!< Configure sFLASH_SPI pins: MOSI */
GPIO_InitStructure.GPIO_Pin = sFLASH_SPI_MOSI_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(sFLASH_SPI_MOSI_GPIO_PORT, &GPIO_InitStructure);

/*!< Configure sFLASH_SPI pins: MISO */
GPIO_InitStructure.GPIO_Pin = sFLASH_SPI_MISO_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(sFLASH_SPI_MISO_GPIO_PORT, &GPIO_InitStructure);

/*!< Configure sFLASH_CS_PIN pin: sFLASH Card CS pin */
GPIO_InitStructure.GPIO_Pin = sFLASH_CS_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(sFLASH_CS_GPIO_PORT, &GPIO_InitStructure);
}

void sFLASH_WriteEnable(void)
{
/*!< Select the FLASH: Chip Select low */
sFLASH_CS_LOW();

/*!< Send "Write Enable" instruction */
sFLASH_SendByte(sFLASH_CMD_WREN);

/*!< Deselect the FLASH: Chip Select high */
sFLASH_CS_HIGH();
}

uint8_t sFLASH_SendByte(uint8_t byte)
{
/*!< Loop while DR register in not emplty */
while (SPI_I2S_GetFlagStatus(sFLASH_SPI, SPI_I2S_FLAG_TXE) == RESET);

/*!< Send byte through the SPI1 peripheral */
SPI_I2S_SendData(sFLASH_SPI, byte);

/*!< Wait to receive a byte */
while (SPI_I2S_GetFlagStatus(sFLASH_SPI, SPI_I2S_FLAG_RXNE) == RESET);

/*!< Return the byte read from the SPI bus */
return SPI_I2S_ReceiveData(sFLASH_SPI);
}

void SPI1Config(void)
{
RCC->APB2ENR |= RCC_APB2ENR_SPI1EN; // SPI1 clock enable

SPI1->CR1 &= ~SPI_CR1_SPE; // SPI1 disable

SPI1->CR1 &= ~SPI_CR1_BIDIMODE; // 2-line unidirectional data mode selected
SPI1->CR1 |= SPI_CR1_BIDIOE; // Output enable (transmit and receive mode)
SPI1->CR1 &= ~SPI_CR1_DFF; // data frame format = 8bit
SPI1->CR1 &= ~SPI_CR1_LSBFIRST; // MSB transmitted first
SPI1->CR1 &= ~SPI_CR1_RXONLY; // Output enable (transmit and receive mode)
SPI1->CR1 &= ~SPI_CR1_SSM; // NSS signal is driven low when the master starts the communication
SPI1->CR1 |= SPI_CR1_MSTR; // configure as master
SPI1->CR1 |= (SPI_CR1_BR_1+SPI_CR1_BR_0); // Set Baud rate control to PClc/16 (24Mhz/8 = 750kHz)
SPI1->CR1 |= SPI_CR1_CPOL; // CPOL = 1 (Figure 239. Data clock timing diagram) see p.660 in RM
SPI1->CR1 |= SPI_CR1_CPHA; // CPHA = 1
SPI1->CR2 |= SPI_CR2_SSOE; // Enable NSS output for master mode

SPI1->CR1 |= SPI_CR1_SPE; // SPI1 enable
}

  RCC->APB2ENR |= RCC_APB2ENR_AFIOEN;                // Enable Clock to alternate function GPIO.
  AFIO->MAPR   |= AFIO_MAPR_SWJ_CFG_JTAGDISABLE;     // JTAG-DP Disabled and SW-DP Enabled
  AFIO->MAPR   |= AFIO_MAPR_SPI1_REMAP;                // Remap SPI1 pins (using JTAG pins)