#include "board.h"
#include "board_memories.h"
#include <pmc/pmc.h>

#ifdef MCK24 // 24 MHz
//#define B_MUL 24
#define B_MUL 24
#define B_DIV 6
#endif

#ifdef MCK12 // 12 MHz
//#define B_MUL 24
#define B_MUL 24
#define B_DIV 3
#endif

#ifdef MCK18 // 18.432 MHz
#define B_MUL 75
#define B_DIV 14
#endif

#ifdef MCK16 // 16 MHz
#define B_MUL 24
#define B_DIV 4
#endif
//------------------------------------------------------------------------------
// Internal definitions
//------------------------------------------------------------------------------
// Startup time of main oscillator (in number of slow clock ticks).
#define BOARD_OSCOUNT (AT91C_CKGR_OSCOUNT & (0x80 << 8))

// USB PLL divisor value to obtain a 48MHz clock.
#define BOARD_USBDIV AT91C_CKGR_USBDIV_1

// PLL frequency range.
#define BOARD_CKGR_PLL AT91C_CKGR_OUT_0

// PLL startup time (in number of slow clock ticks).
#define BOARD_PLLCOUNT (16 << 8)

// PLL MUL value.
#define BOARD_MUL (AT91C_CKGR_MUL & (B_MUL << 16)) // 72

// PLL DIV value.
#define BOARD_DIV (AT91C_CKGR_DIV & B_DIV) // 14

// Master clock prescaler value.
#define BOARD_PRESCALER AT91C_PMC_PRES_CLK_2

//------------------------------------------------------------------------------
// Internal functions
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// Default spurious interrupt handler. Infinite loop.
//------------------------------------------------------------------------------
void defaultSpuriousHandler( void )
{
while (1);
}

//------------------------------------------------------------------------------
/// Default handler for fast interrupt requests. Infinite loop.
//------------------------------------------------------------------------------
void defaultFiqHandler( void )
{
while (1);
}

//------------------------------------------------------------------------------
/// Default handler for standard interrupt requests. Infinite loop.
//------------------------------------------------------------------------------
void defaultIrqHandler( void )
{
while (1);
}

//------------------------------------------------------------------------------
// Global Functions
//------------------------------------------------------------------------------

//------------------------------------------------------------------------------
/// Performs the low-level initialization of the chip. This includes EFC, master
/// clock, AIC & watchdog configuration, as well as memory remapping.
//------------------------------------------------------------------------------
void LowLevelInit(void)
{
unsigned char i;

// Set flash wait states in the EFC
// 48MHz = 1 wait state
#if defined(at91sam7s512)
AT91C_BASE_EFC0->EFC_FMR = AT91C_MC_FWS_1FWS;
AT91C_BASE_EFC1->EFC_FMR = AT91C_MC_FWS_1FWS;
#else
AT91C_BASE_MC->MC_FMR = AT91C_MC_FWS_1FWS;
#endif

// Initialize main oscillator
AT91C_BASE_PMC->PMC_MOR = BOARD_OSCOUNT | AT91C_CKGR_MOSCEN;
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS));

// Initialize PLL at 100MHz and USB clock to 50MHz
AT91C_BASE_PMC->PMC_PLLR = BOARD_USBDIV | BOARD_CKGR_PLL | BOARD_PLLCOUNT
| BOARD_MUL | BOARD_DIV;
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK));

// Wait for the master clock if it was already initialized
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));

// Switch to slow clock + prescaler
AT91C_BASE_PMC->PMC_MCKR = BOARD_PRESCALER;
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));

// Switch to fast clock + prescaler
AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK;
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));

// Initialize AIC
AT91C_BASE_AIC->AIC_IDCR = 0xFFFFFFFF;
AT91C_BASE_AIC->AIC_SVR[0] = (unsigned int) defaultFiqHandler;
for (i = 1; i < 31; i++) {

AT91C_BASE_AIC->AIC_SVR[i] = (unsigned int) defaultIrqHandler;
}
AT91C_BASE_AIC->AIC_SPU = (unsigned int) defaultSpuriousHandler;

// Unstack nested interrupts
for (i = 0; i < 8 ; i++) {

AT91C_BASE_AIC->AIC_EOICR = 0;
}

// Enable Debug mode
AT91C_BASE_AIC->AIC_DCR = AT91C_AIC_DCR_PROT;

// Watchdog initialization
AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;

// Remap the internal SRAM at 0x0
BOARD_RemapRam();

// Disable RTT and PIT interrupts (potential problem when program A
// configures RTT, then program B wants to use PIT only, interrupts
// from the RTT will still occur since they both use AT91C_ID_SYS)
AT91C_BASE_RTTC->RTTC_RTMR &= ~(AT91C_RTTC_ALMIEN | AT91C_RTTC_RTTINCIEN);
AT91C_BASE_PITC->PITC_PIMR &= ~AT91C_PITC_PITIEN;
}

Кварц   R1       C1       C2       div      mul
4       1k       10n      1n       1        24
6       1k       10n      1n       2        32
8       1k       10n      1n       2        24
12      1k       10n      1n       3        24
16      1k       10n      1n       4        24
18      1k       10n      1n       6        32
24      1k       10n      1n       6        24    (генератор, а не кварц)