#include "stm32f10x_gpio.h"
#include "stm32f10x.h"
#include "stm32f10x_rcc.h"
#define SYSCLK_FREQ_72MHz 72000000

void delay_ms(uint32_t miliseconds)
{
unsigned long i;
for (i=0; i<miliseconds*72000; i++) {
}
}

void init_clocks()
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;

/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/
/* Enable HSE */
RCC->CR &= ~((uint32_t)RCC_CR_HSION);
RCC->CR |= ((uint32_t)RCC_CR_HSEON);

/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSEStatus = RCC->CR & RCC_CR_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));

if ((RCC->CR & RCC_CR_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;
}else{
HSEStatus = (uint32_t)0x00;
}

RCC->CR |= ((uint32_t)RCC_CR_CSSON);// protector - with auto swithcing on HSI if HSE is bad

if (HSEStatus == (uint32_t)0x01)
{
/* Enable Prefetch Buffer */
FLASH->ACR |= FLASH_ACR_PRFTBE;

/* Flash 2 wait state */
FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;


/* HCLK = SYSCLK */
RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;//AHB = 72MHz

/* PCLK2 = HCLK */
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;//72MHz

/* PCLK1 = HCLK */
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2;//APB1 = 72/2 = 36MHz max


/* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));//16-21bits unset
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9);//PLL = HSE(not divided) * 9; 16,18-20 set

/* Enable PLL */
RCC->CR |= RCC_CR_PLLON;//pll on

/* Wait till PLL is ready */
while((RCC->CR & RCC_CR_PLLRDY) == 0)
{
}

/* Select PLL as system clock source */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));//unset 0,1
RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;//pll select as SYSCLK

/* Wait till PLL is used as system clock source */
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)
{
}


}else{ /* If HSE fails to start-up, the application will have wrong clock
configuration. User can add here some code to deal with this error */
}

}
void init_gpio_a()
{

GPIO_InitTypeDef porta;
RCC_APB2PeriphClockCmd (RCC_APB2Periph_GPIOA, ENABLE);
GPIO_StructInit(&porta);
porta.GPIO_Pin = GPIO_Pin_12;
porta.GPIO_Mode = GPIO_Mode_Out_PP;
porta.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOA,&porta);

}
int main(void)
{
uint16_t uart_data=0;

init_clocks();
init_gpio_a();
while(1)
{

GPIO_SetBits(GPIOA,GPIO_Pin_12);
delay_ms(1000);
GPIO_ResetBits(GPIOA,GPIO_Pin_12);
delay_ms(1000);

}
}