//
// Define a memory region that covers the entire 4 GB addressable space of the
// processor.
//
define memory mem with size = 4G;

//
// Define a region for the on-chip flash.
//
define region FLASH = mem:[from 0x01000000 to 0x0100FFFF];

//
// Define a region for the on-chip SRAM.
// SRAM size of 240KB for CC3200 ES 1.33 device
define region SRAM = mem:[from 0x20004000 to 0x2003C000];

//
// Define a block for the heap. The size should be set to something other
// than zero if things in the C library that require the heap are used.
//
define block HEAP with alignment = 8, size = 0x00008000 { };
keep {readonly section .cmdtbl};
define block CmdTbl {section .cmdtbl };

//
// Indicate that the noinit values should be left alone. This includes the
// stack, which if initialized will destroy the return address from the
// initialization code, causing the processor to branch to zero and fault.
//
do not initialize { section .noinit };

define block CSTACK with alignment = 8, size = 0x800 { section .stack };
do not initialize { section .stack};
place at end of SRAM { block CSTACK };

//-----------------------------------------------------------
initialize by copy { readwrite };
//-----------------------------------------------------------

//
// Place the interrupt vectors at the start of flash.
// Define Flash = 0 if application doesn't use Flash memory
// else define Flash = 1
//

if (!isdefinedsymbol(Flash))
{
//-----------------------------------------------------------
place at start of SRAM { readonly section .intvec };
//-----------------------------------------------------------

//
// Place the remainder of the read-only items into flash.
//
place in SRAM { readonly };

//
// Place the RAM vector table at the start of SRAM.
//

//-----------------------------------------------------------
place in SRAM { section VTABLE };
//------------------------------------------------------------

//
// Place all read/write items into SRAM.
//

place in SRAM { block CmdTbl };
place in SRAM { readwrite, block HEAP };
}
else if (!Flash)
{
//-----------------------------------------------------------
place at start of SRAM { readonly section .intvec };
//-----------------------------------------------------------

//
// Place the remainder of the read-only items into flash.
//
place in SRAM { readonly };

//
// Place the RAM vector table at the start of SRAM.
//

//-----------------------------------------------------------
place in SRAM { section VTABLE };
//------------------------------------------------------------

//
// Place all read/write items into SRAM.
//

place in SRAM { block CmdTbl };
place in SRAM { readwrite, block HEAP };
}
else
{
//-----------------------------------------------------------
place at start of FLASH { readonly section .intvec };
//-----------------------------------------------------------

//
// Place the remainder of the read-only items into flash.
//
place in FLASH { readonly };
place in FLASH { block CmdTbl };

//
// Place the RAM vector table at the start of SRAM.
//

//-----------------------------------------------------------
place in SRAM { section VTABLE };
//------------------------------------------------------------

//
// Place all read/write items into SRAM.
//
place in SRAM { readwrite, block HEAP };
}