USARTx_CR1:

Bits 25:21 DEAT[4:0]: Driver Enable assertion time
This 5-bit value defines the time between the activation of the DE (Driver Enable) signal and
the beginning of the start bit. It is expressed in sample time units (1/8 or 1/16 bit duration,
depending on the oversampling rate).

Bits 20:16 DEDT[4:0]: Driver Enable de-assertion time
This 5-bit value defines the time between the end of the last stop bit, in a transmitted
message, and the de-activation of the DE (Driver Enable) signal. It is expressed in sample
time units (1/8 or 1/16 bit duration, depending on the oversampling rate).
If the USARTx_TDR register is written during the DEDT time, the new data is transmitted
only when the DEDT and DEAT times have both elapsed.

USARTx_CR3:

Bit 15 DEP: Driver enable polarity selection
0: DE signal is active high.
1: DE signal is active low.

Bit 14 DEM: Driver enable mode
This bit allows the user to activate the external transceiver control, through the DE signal.
0: DE function is disabled.
1: DE function is enabled. The DE signal is output on the RTS pin.

Modbus/RTU
In this mode, the end of one block is recognized by a “silence” (idle line) for more than 2 character times.
This function is implemented through the programmable timeout function.
The timeout function and interrupt must be activated, through the RTOEN bit in the USARTx_CR2 register
and the RTOIE in the USARTx_CR1 register. The value corresponding to a timeout of 2 character times
(for example 22 x bit duration) must be programmed in the RTO register. When the receive line is idle for this duration,
after the last stop bit is received, an interrupt is generated, informing the software that the current block reception is completed.

Modbus/ASCII
In this mode, the end of a block is recognized by a specific (CR/LF) character sequence.
The USART manages this mechanism using the character match function.
By programming the LF ASCII code in the ADD[7:0] field and by activating the character match interrupt (CMIE=1),
the software is informed when a LF has been received and can check the CR/LF in the DMA buffer.

Bit 23 RTOEN: Receiver timeout enable
This bit is set and cleared by software.
0: Receiver timeout feature disabled.
1: Receiver timeout feature enabled.
When this feature is enabled, the RTOF flag in the USARTx_ISR register is set if the RX line is idle
(no reception) for the duration programmed in the RTOR (receiver timeout register).

Bits 23:0 RTO[23:0]: Receiver timeout value
This bit-field gives the Receiver timeout value in terms of number of bit duration.
In standard mode, the RTOF flag is set if, after the last received character, no new start bit is
detected for more than the RTO value.