void interrupt IRQ(void)
{
    u08 port_tmp;
    
    if (PIR1_bit.CCP1IF)
    {
        PIR1_bit.CCP1IF = 0;
        // -----------------------------------------------------------------------------------------
        // J1850-PWM TX Service
        // -----------------------------------------------------------------------------------------
        if (Sys_CurrMode.JTX)
        {
            static u08 data;                        // Transiever reg
            static u08 bit_cnt;                     // Bit counter
            static u08 nxt_l;                       // Next pulse length (for 0 or 1)

            TMR1L = 0;                              // Clear compare timer

            // Falling edge of bit pulse
            // -------------------------
            if      (J1850_T_STM.b.B_F_F)
            {
                CCPR1L = nxt_l;                     // Set compare interval (0 part of data bit)
                J1850_T_STM.full = 0;               // Clear J1850-TX state machine

                // Data BYTE was send
                if (--bit_cnt == 0)
                {
                    if (--DATA_cnt == 0)
                    {
                        // End of packet
                        // -------------
                        J1850_T_STM.b.BYTE_SN = 1;                  // Set next state of state machine
                        CCP1_Comp_Next_Clr();                       // Next edge will be falling (NO EDGE)
                    }
                    else
                    {
                        // End of byte -> load next byte
                        // -----------------------------
                        data = DATA_Buff[DATA_Buff_indx++];         // Load next byte to byte buffer
                        bit_cnt = 8;                                // Update bit per byte counter
                        J1850_T_STM.b.B_R_F = 1;                    // Set next state of state machine
                        CCP1_Comp_Next_Set();                       // Next edge will be rising
                    }
                }
                // Prepare for send next byte
                else
                {
                    // Next bit
                    // --------
                    J1850_T_STM.b.B_R_F = 1;                        // Set next state of state machine
                    CCP1_Comp_Next_Set();                           // Next edge will be rising
                }
            }

            // Rising edge of bit pulse
            // ------------------------
            else if (J1850_T_STM.b.B_R_F)
            {
                // 1 data bit = Set compare interval 8 us,  next interval - 16 us
                if (data & 0x80) {CCPR1L = 40 - 16; nxt_l = 80 - 16;}  
                // 0 data bit = Set compare interval 16 us, next interval - 8  us
                else             {CCPR1L = 80 - 16; nxt_l = 40 - 16;}
                CCP1_Comp_Next_Clr();                               // Next edge will be falling

                data <<= 1;                                         // Shift data byte          
                J1850_T_STM.full = 0; J1850_T_STM.b.B_F_F = 1;      // Set next state of state machine
            }

            // Rise fornt of SOF pulse
            // -----------------------
            else if (J1850_T_STM.b.SOF_R_F)
            {
                CCPR1H = 0; TMR1H  = 0;                             // Clear MSB of compare timer
                CCPR1L = 160 - 16;                                  // Set compare interval (32 us)
                CCP1_Comp_Next_Clr();                               // Next edge will be falling
                
                data = DATA_Buff[DATA_Buff_indx++];                 // Load first data byte
                bit_cnt = 8;                                        // Set bit per byte counter
                J1850_T_STM.full = 0; J1850_T_STM.b.SOF_F_F = 1;    // Set next state of state machine
            }

            // Fall fornt of SOF pulse
            // -----------------------
            else if (J1850_T_STM.b.SOF_F_F)
            {
                CCPR1L = 80 - 16;                                   // Set compare interval (16 us)
                CCP1_Comp_Next_Set();                               // Next edge will be rising
                J1850_T_STM.full = 0; J1850_T_STM.b.B_R_F = 1;      // Set next state of state machine
            }

            // Send EOP - End packet
            // ---------------------
            else if (J1850_T_STM.b.BYTE_SN)
            {
                TMR1H = 0;                                          // Clear MSB of compare timer
                CCPR1H = (360 - 16) >> 8;                           // Load compare reg
                CCPR1L = (360 - 16) & 0xFF;
                J1850_T_STM.full = 0; J1850_T_STM.b.EOF = 1;        // Set next state of state machine
            }

            // EOF was send - PACKET SEND
            // --------------------------
            else if (J1850_T_STM.b.EOF)
            {
                J1850_T_STM.full = 0;                               // Clear J1850-TX state machine
                PIE1_bit.CCP1IE = DISABLE;                          // Disable Compare Interrupts
                Sys_Events = SE_J1850_SEND_FRAME;                   // Set System Event
            }
        }
.......