#ifndef __W3150_H__
#define __W3150_H__

#define WZ_MODE            0x00

#define WZ_GATEWAY         0x01
#define WZ_SUBNET          0x05
#define WZ_MAC             0x09
#define WZ_IP              0x0F

#define WZ_RXMEM_CFG       0x1A
#define WZ_TXMEM_CFG       0x1B

//Mode reg **************************
#define WZS_MODE           0x00
#define WZM_CLOSED         0
#define WZM_TCP            1
#define WZM_UDP            2
#define WZM_IPRAW          3
#define WZM_MACRAW         4
#define WZM_PPPoE          5

//Command reg ***********************
#define WZS_CMD            0x01
#define WZC_OPEN           0x01
#define WZC_LISTEN         0x02
#define WZC_CONNECT        0x04
#define WZC_DISCON         0x08
#define WZC_CLOSE          0x10
#define WZC_SEND           0x20
#define WZC_SENDMAC        0x21
#define WZC_SENDKEEP       0x22
#define WZC_RECV           0x40

//***********************************
#define WZS_INT            0x02
#define WZS_STA            0x03
#define WZS_SPORT          0x04
#define WZS_MAC            0x06
#define WZS_IP             0x0C
#define WZS_DPORT          0x10
#define WZS_TTL            0x16

#define WZS_TXFS           0x20
#define WZS_TXRD           0x22
#define WZS_TXWR           0x24

#define WZS_RXS            0x26
#define WZS_RXRD           0x28


typedef struct {
  uint8_t DefGateway[4];
  uint8_t IpMask[4];
  uint8_t Mac[6];
  uint8_t Ip[4];
  uint8_t MemCfg[2];
} wzFullStaticIpConfig;

#pragma inline=forced
uint8_t wzRead(void)
{
  uint_fast8_t r;
  RDOn();
  __no_operation();
  __no_operation();
  __no_operation();
  __no_operation();
  __no_operation();
  r=AD0_PORT;
  RDOff();
  return r;
}

#pragma inline=forced
void wzWrite(uint8_t d)
{
  AD0_PORT=d;
  __no_operation();
  WROn();
  __no_operation();
  __no_operation();
  __no_operation();
  WROff();
}

#pragma inline=forced
void wzSetAddr(unsigned addr,unsigned chip, bool read)
{
  A0_PORT=chip | (1<<A0_PIN);
  FIO0DIR2=0xFF;
  wzWrite(addr);
  A0_PORT=chip | (1<<A1_PIN);
  wzWrite(addr>>8);
  A0_PORT=chip | (1<<A1_PIN) | (1<<A0_PIN);
  if (read) FIO0DIR2=0x00;
}

#pragma inline=forced
static void wzFullStaticInit(const wzFullStaticIpConfig *Cfg, unsigned chip)
{
  uint8_t  *tmp;
  uint8_t Len;

  A0_PORT=chip;
  FIO0DIR2=0xFF;
  wzWrite(0x80);
  wzWrite(0x07);
  wzSetAddr(WZ_GATEWAY,chip,false);
  tmp=(uint8_t *)Cfg;
  Len=18;
  do {
    wzWrite(*tmp++);
  }while(--Len);
  wzSetAddr(WZ_RXMEM_CFG,chip,false);
  wzWrite(*tmp++);
  wzWrite(*tmp++);
}

/#endif /*__W3150_H__*/

    BCFG3 = (0<<LPC_IDCY) | (0x7<<LPC_WST1) | (0<<LPC_RBLE) | (0x7<<LPC_WST2) | (0<<LPC_WP) | (0<<LPC_BM) | (0<<LPC_MW); // задержки можно уменьшать, не было времени проверить.
   {
        uint32_t Tmp = PINSEL2 & (0xF00C160F);
        PINSEL2 = Tmp |
            (1UL<<2)|            //P1[26..31] = JTAG
            (0UL<<3)|            //P1[16..25] = GPIO
            (1UL<<4)|            // P2.[0..15] = D[0..15], P1.0 = CS0, P1.1 = OE, P3.31 = BLS0, P3.30 = BLS1,
                                // P2[16..29] = GPIO, P2[30, 31] = GPIO/AN, P3[28, 29] = GPIO/AN
            (0UL<<6)|(0UL<<7)|    // P3.29 = GPIO, P3.28 = GPIO
            (1UL<<8)|            // P3.27 = WE
            (1UL<<11)|            // P3.26 = CS1
            (0UL<<13)|            // P3.23 = GPIO
        //    (1UL<<14)|            // P3.25 = CS2
            (1UL<<16)|            // P3.24 = CS3
            (0UL<<20)|(0UL<<21)|(0UL<<22)|    // P2[28..31] = GPIO
            (1UL<<23)|(1UL<<24)|    //P3.0 = A0, P3.1 = A1
            (6UL<<25);            //P3[2..19] = A[2..19]
    }