AT91F_AIC_ConfigureIt( AT91C_BASE_AIC,   AT91C_ID_US0, 7 , AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL  | AT91C_AIC_PRIOR_LOWEST, usart0_irq_handler);  
    AT91F_AIC_EnableIt (AT91C_BASE_AIC, AT91C_ID_US0);

void usart0_irq_handler(void)
{
        // calling irq processor
        if (_comports [ 0 ])
                {
                 _comports [ 0 ] -> __irq_processor();
                }
/////////////////////
    unsigned long rx_data                     = AT91C_BASE_PITC->PITC_PIVR;   /* Read the interrupt source, ignore the value*/

    AT91C_BASE_AIC->AIC_IVR     = 0;                            /* Debug variant of IVR (protect mode is used)*/
    AT91C_BASE_AIC->AIC_ICCR    = AT91C_ID_US0;                 /* Clear  USART0 interrupt                    */
    AT91C_BASE_AIC->AIC_EOICR   = 0;                            /* Signal end of interrupt                    */

       //* Reset the satus bit
AT91C_BASE_US0->US_CR = AT91C_US_RSTSTA;  

}

AT91F_AIC_EnableIt (AT91C_BASE_AIC, AT91C_ID_US0);

void OS_CPU_IRQ_ISR_Handler(void)
  {
    pFNCT pfnct;
  
    pfnct = (pFNCT)*AT91C_AIC_IVR;   // Чтение адреса обработчика с максимальным приоритетом

    AT91C_BASE_AIC->AIC_IVR = 0;                // Debug variant of vector read (protect mode is used)
    if (pfnct) pfnct();                         // Вызвать обработчик
    AT91C_BASE_AIC->AIC_EOICR = 0;              // Признак завершения обработчика
  }

void UART0_IRQ_Handler(void)
  {
    BYTE data;
    AT91PS_USART pCOM;
    DWORD status;

    // читаем регистр состояния в соотв. с текущим прерыванием
    status = pCOM->US_CSR;
    
    // Есть принятый байт
    if (status & AT91C_US_RXRDY)
      {
        data = pCOM->US_RHR;
        if (!(status & AT91C_US_FRAME))
          {
            QueueAdd(RxQueue, data);
          }
      }
    ....  

    // timeout приема
    if (status & AT91C_US_TIMEOUT)
      {
       // начать новый отсчет
        pCOM->US_CR = AT91C_US_RETTO;
      }  
      
    // очистить признаки ошибок
    pCOM->US_CR = AT91C_US_RSTSTA;
    // Разбудить задачу
    OSMboxPost(TabloMsg, (void*)1);
  }

void InitUSART (void) {

  // Enable interrupts
  // Disable the interrupt on the interrupt controller
  AT91C_BASE_AIC->AIC_IDCR = (1 << AT91C_ID_US0);
  // Save the interrupt handler routine pointer and the interrupt priority
  void * ptr  = 0;
  ptr = (void *)(unsigned long)AT91C_BASE_AIC->AIC_SVR[AT91C_ID_US0];
  *(unsigned long *)&old_usart_handlers[0] = (unsigned long)ptr;
  AT91C_BASE_AIC->AIC_SVR[AT91C_ID_US0] = (unsigned long) USART0_ISR_Handler;
  // Store the Source Mode Register
  AT91C_BASE_AIC->AIC_SMR[AT91C_ID_US0] = AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL | AT91C_AIC_PRIOR_LOWEST;
  // Clear the interrupt on the interrupt controller
  AT91C_BASE_AIC->AIC_ICCR = (1 << AT91C_ID_US0);
  // disable all interrupts on USART
  AT91C_BASE_US0->US_IDR = 0xFFFFFFFF;
  // Enable the interrupt on the interrupt controller

  AT91C_BASE_AIC->AIC_IECR = (1 << AT91C_ID_US0);
  // Enable the interrupt on the USART
      return;



}

static  void  USART0_ISR_Handler (void)
{
    CPU_INT32U      status;

    if (blink) {
        AT91C_BASE_PIOA->PIO_SODR = (1<<13);
        AT91C_BASE_PIOB->PIO_SODR = (1<<26);
    blink = 0;
    }
    else
    {
        AT91C_BASE_PIOA->PIO_CODR = (1<<13);
        AT91C_BASE_PIOB->PIO_CODR = (1<<26);
    blink = 1;
    }
    /*
    status = AT91C_BASE_AIC->AIC_IVR;
    if (status!=0x1124)
        AT91C_BASE_AIC->AIC_IVR = 0;
    
    status = AT91C_BASE_US0->US_CSR;
    if (status==0x1124)
        AT91C_BASE_AIC->AIC_IVR = 0;
*/
    AT91C_BASE_AIC->AIC_ICCR  = 1 << AT91C_ID_US0;                     /* Clear the  interrupts                            */
    AT91C_BASE_AIC->AIC_EOICR = 0;                                      /* Signal end of interrupt                              */
    
    return;    
}

AT91C_BASE_PITC->PITC_PIMR =  ((BSP_CPU_ClkFreq() * 1000) / 16 / OS_TICKS_PER_SEC) - 1;


  // Enable interrupts
  // Disable the interrupt on the interrupt controller
  AT91C_BASE_AIC->AIC_IDCR = (1 << AT91C_ID_SYS);

  // Save the interrupt handler routine pointer and the interrupt priority
  void * ptr  = 0;
  ptr = (void *)(unsigned long)AT91C_BASE_AIC->AIC_SVR[AT91C_ID_SYS];
  *(unsigned long *)&old_handler = (unsigned long)ptr;
  AT91C_BASE_AIC->AIC_SVR[AT91C_ID_SYS] = (unsigned long) pitc_handler;
  // Store the Source Mode Register
  AT91C_BASE_AIC->AIC_SMR[AT91C_ID_SYS] = AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL | AT91C_AIC_PRIOR_LOWEST;
  // Clear the interrupt on the interrupt controller
  AT91C_BASE_AIC->AIC_ICCR = (1 << AT91C_ID_SYS);

  // Enable the interrupt on the interrupt controller
  AT91C_BASE_AIC->AIC_IECR = (1 << AT91C_ID_SYS);

  // Enable the interrupt on the pit
  pimr = AT91C_BASE_PITC->PITC_PIMR;
  AT91C_BASE_PITC->PITC_PIMR = pimr | AT91C_PITC_PITIEN;

  // Enable the pit
  pimr = AT91C_BASE_PITC->PITC_PIMR;
  AT91C_BASE_PITC->PITC_PIMR = pimr | AT91C_PITC_PITEN;


}

void pitc_handler(void)
{

for(unsigned short i=0; i<MAX_TIME_COUNTERS; i++)
    {
        if(gMeters[i].connected)
            {
             gMeters[i].counter += OS_TIMER_PERIOD * 2;
            
            // here some like "garbage collector"
            // if no reset within 5 minutes, disconnect that
            if (gMeters[i].counter > 300000)
                gMeters[i].connected = 0;
            }// ?connected
    }// loop

    old_handler();

}