.mmregs
.global _p_buffer_in,_p_buffer_out,_dline,_fcoeff,_fir_ord,_p_buff_lenth
.global _fir_processing

_fir_processing:
; saving regs content into stack
    pshm ar0; used as delay line and coeff. cycling addressing increment
    pshm ar1; holds input data array start address
    pshm ar2   ; holds pointer to filter coeff. array addressing
    pshm ar3; holds pointer to delay line array addressing
    pshm ar4; holds output data array start address
    pshm ar5; holds output data array
    nop
    nop
    
; Initialization
    stm #1,ar0                   ;set increment step for cycling buffers
    mvdm *(_fir_ord),BK          ;set cyclic buffer size (for delay line and coeff buffer)
    stm #_p_buff_in,ar1             ;load data_in array start address
    stm #_fcoeff,ar2             ;load coeff. array start address
    stm #_dline,ar3                 ;load delay line array start address
    stm #_p_buffer_out,ar4         ;load output data buffer array address
    mvdm *(_p_buff_length)-1,brc ;load BRC with processing data block length (PROC_BUFFER_LENGTH)
    nop
    nop
    
; Filtration
    rptb fir_loop_end-1            ; repeat FIR routine for entire processing data buffer
    mvdd *ar1+,*ar3+%          ; load next input sample from input proc. array into delay line array
    
    rptz a,_fir_ord-1            ; FIR order less 1 iterations per each input data sample
    mac *ar2+0%,*ar3+0%,a             ; MAC operation on cyclic delay line and coeff. arrays
    
    rnd a                         ; round off value in acc. A to 16 bits
    sth a,*ar4+                      ; store output value into data output array
  fir_loop_end:
    
    popm ar5
    popm ar4
    popm ar3
    popm ar2
    popm ar1
    popm ar0