DDRB = ((1<<MOSI)|(1<<SCLK)|(1<<SS));

//Enable SPI, Select Master, SCLK idles high,
//Sample on rising edge Setup on falling edge,
//SCLK=F_CPU/4
SPCR =0x52; //((1<<SPE)|(1<<MSTR)|(1<<CPOL)|(1<<CPHA));

//Serially reset the Chip
SPDR = 0xFF;

//Wait for transfer
while(!(SPSR & (1<<SPIF)));

//Serially reset the Chip
SPDR = 0xFF;

//Wait for transfer
while(!(SPSR & (1<<SPIF)));

//Serially reset the Chip
SPDR = 0xFF;

//Wait for transfer
while(!(SPSR & (1<<SPIF)));

//Serially reset the Chip
SPDR = 0xFF;

//Wait for transfer
while(!(SPSR & (1<<SPIF)));

//Serially reset the Chip
SPDR = 0xFF;

//Wait for transfer
while(!(SPSR & (1<<SPIF)));


//Send to Comm Reg: Next Write Clk
SPDR = 0b00100000; //0x20

//Wait for transfer
while(!(SPSR & (1<<SPIF)));

//Send to ClkReg: Clock Bits and Update rate
SPDR = 0x18; //0b00011000;

//Wait for transfer
while(!(SPSR & (1<<SPIF)));

//Send to Comm Reg: write setup
SPDR = 0b00010000; //0x10

//Wait for transfer
while(!(SPSR & (1<<SPIF)));

//Send to Setup: FSYNC, Gain, Conditions, Self Calibration
SPDR = 0b01000100;

//Wait for transfer
while(!(SPSR & (1<<SPIF)));

while(1)
{
//Is DDRY pin low/data ready?

//Send to Comm: next read Data
SPDR = 0b00111000; // 0x38

//Wait for transfer
while(!(SPSR & (1<<SPIF)));
DDRB=0x10;
DDRB.5=1;
CLK=1;
while(DRDY);
delay_us(us1);
CLK=0; delay_us(us1);
while(i<16)
{
CLK=1;delay_us(us1);
adc_rez[i]='0';
if(D_OUT==1) adc_rez[i]='1';
CLK=0;delay_us(us1);
i++;
}

write7705(unsigned char u8)
{ unsigned char j=0;
CS=CLK=1;
delay_us(us1);
CS=0;
while(j<8)
{
delay_us(us1);
CLK=0;
delay_us(us1);
if (u8 &(1<<(7-j))) D_IN=1; else D_IN=0;
CLK=1;
j++;
}
delay_us(us1);
CS=1;
}

unsigned read7705(void)
{ unsigned char j=0;
unsigned result=0;
CS=CLK=1;
delay_us(us1);
while(DRDY);
delay_us(us1);
CS=0;
while(j<16)
{
delay_us(us1);
CLK=0;
delay_us(us1);
CLK=1;
delay_us(us1);
adc_rez[j]='0';
if (D_OUT) {adc_rez[j]='1'; result=result+pow(2,15-j);}
j++;
}
CS=1;
return result;
}

00094 u08 i2cGetbyte(UINT last)
00095 {
00096     int i;
00097     u08 c,b = 0;
00098        
......
00101
00102     for(i=7;i>=0;i--)
00103     {
00104         HDEL;
00105         I2C_SCL_HI;             // clock HI
00106         c = inb(SDAPIN) & (1<<SDA);  
00107         b <<= 1;
00108         if(c) b |= 1;
00109         HDEL;
00110         I2C_SCL_LO;             // clock LO
00111     }
....

void write7705(unsigned char u8)
{ unsigned char j=0;
CS=CLK=1; D_IN=0;
delay_us(us1);
CS=0;
while(j<8)
{
delay_us(us1);
CLK=0;D_IN=0;
if (u8 &(1<<(7-j))) D_IN=1;
delay_us(us1);
CLK=1;
j++;
}
delay_us(us1);
CS=1;
}

unsigned read7705(void)
{ unsigned char j=0;
unsigned result=0;
CS=CLK=1;
delay_us(us1);
while(DRDY);
delay_us(us1);
CS=0;
while(j<16)
{
delay_us(us1);
CLK=0;
delay_us(us1);
adc_rez[j]='0';
result<<=1;
if (D_OUT==1) {adc_rez[j]='1'; result|=1;}
CLK=1;
j++;
}
CS=1;
return result;
}

#define CS      PORTB.2
#define CLK     PORTB.5
#define DRDY    PINB.0
#define D_IN    PORTB.3
#define D_OUT   PINB.4

#define D_OUT    PORTB.3  // MOSI
#define D_IN   PINB.4  // MISO