AT91F_Flash_Init;
AT91F_Flash_Ready;
AT91F_Flash_Write;

at91_flash.h:
#ifndef AT91_FLASH_H__
#define AT91_FLASH_H__
#include    <stdint.h>
#include    <ioAT91SAM77S64.h>

#define MCK_CYCLES          ((15ULL * MCK + 5000000) / 10000000)
#define FLASH_WAITSTATES    MCK_CYCLES < 30000000ULL ? AT91C_MC_FWS_0FWS : AT91C_MC_FWS_1FWS

inline void ErasePage(uint32_t const *addr)
{
    FlashCommand( (0x5AULL *  AT91C_MC_KEY / 0xFF) | (((uint32_t)addr >> 7) << 8) | AT91C_MC_FCMD_START_PROG, \
                  (0 * AT91C_MC_FRDY) | (0 * AT91C_MC_LOCKE) | ( 0 * AT91C_MC_PROGE) \
                  | (0 * AT91C_MC_NEBP) | (FLASH_WAITSTATES) | (MCK_CYCLES * AT91C_MC_FMCN / 0xFF));
}

inline void ProgramPage(uint32_t const *addr)
{
    FlashCommand( (0x5AULL *  AT91C_MC_KEY / 0xFF) | (((uint32_t)addr >> 7) << 8) | AT91C_MC_FCMD_START_PROG, \
                  (0 * AT91C_MC_FRDY) | (0 * AT91C_MC_LOCKE) | ( 0 * AT91C_MC_PROGE) \
                  | (1 * AT91C_MC_NEBP) | (FLASH_WAITSTATES) | (MCK_CYCLES * AT91C_MC_FMCN / 0xFF));
}

inline void RewritePage(uint32_t const *addr)
{
    FlashCommand( (0x5AULL *  AT91C_MC_KEY / 0xFF) | (((uint32_t)addr >> 7) << 8) | AT91C_MC_FCMD_START_PROG, \
                (0 * AT91C_MC_FRDY) | (0 * AT91C_MC_LOCKE) | ( 0 * AT91C_MC_PROGE) \
                | (0 * AT91C_MC_NEBP) | (FLASH_WAITSTATES) | (MCK_CYCLES * AT91C_MC_FMCN / 0xFF));
}
#endif  // AT91_FLASH_H__

at91_flash.c:
__ramfunc __arm void FlashCommand_RAM(uint32_t command)
{
    AT91C_BASE_MC->MC_FCR = command;
    while(!(AT91C_BASE_MC->MC_FSR & AT91C_MC_FRDY));
}

__arm void FlashCommand(uint32_t command, uint32_t mode)
{
    uint32_t Status = __get_CPSR();
    do
    {
        __set_CPSR(Status | (1 << CPSR_IRQ_EN));    // disable IRQ
    }
    while(! (__get_CPSR() & (1 << CPSR_IRQ_EN)));
    
    AT91C_BASE_MC->MC_FMR = mode;
    FlashCommand_RAM(command);
    __set_CPSR(Status);             // restore IRQ
}

  FLASH_LOAD 0x100000
  {
  EXE +0 0x40000
    {
    *.o (RESET, +FIRST)
    * (+RO)
    }
  DATA 0x200000 0x7fff
    {
    * (+RW +ZI)
    }
  ISR_EXE 0x208000 0x2000
    {
    flash.o (+RO)
    }
  }

#pragma arm section CODE = "CODE_RAM"
...
#pragma arm section CODE

FLASH_LOAD 0x100000
  {
  EXE +0 0x40000
    {
    *.o (RESET, +FIRST)
    * (+RO)
    }
  DATA 0x200000 0x8000
    {
    * (+RW +ZI)
    }
  ISR_EXE 0x208000 0x2000
    {
    * (CODE_RAM)
    }
  }