void InitADC()
{
  InitTC0();

  // Enable peripheral clock    
  AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_ADC);    
  // Reset the controller
  AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
  // Write to the MR register
  AT91C_BASE_ADC->ADC_MR = 0;// Clear the register

  
  unsigned int prescal;//5MH
  unsigned int startup;//20µs
  unsigned int shtim;  //1667ns track and hold time
  prescal = (BOARD_MCK/(ADC_FREQ*2))-1;
  startup =11;//[(Startup Time * ADCClock)/8]-1 = [(20 10e-6 * 5000000)/8]-1 = 11,5
  shtim=6;    //(HoldTime * ADCClock)-1 = (1667 10e-9 * 5000000)-1 = 7.335
  AT91C_BASE_ADC->ADC_MR =  AT91C_ADC_TRGEN_DIS               | // Íàïèøèòå ê ðåãèñòðó Ã.
                            AT91C_ADC_LOWRES_10_BIT           |
                            AT91C_ADC_SLEEP_NORMAL_MODE       |
                            ((prescal<<8)&AT91C_ADC_PRESCAL)  |
                            ((startup<<16)&AT91C_ADC_STARTUP) |
                            ((shtim<<24)&AT91C_ADC_SHTIM);
  
  AT91C_BASE_ADC->ADC_CHDR =  AT91C_ADC_CH0 |
                              AT91C_ADC_CH1 |
                              AT91C_ADC_CH2 |
                              AT91C_ADC_CH3 |
                              AT91C_ADC_CH4 |
                              AT91C_ADC_CH5 |
                              AT91C_ADC_CH6 |
                              AT91C_ADC_CH7;

  AT91C_BASE_ADC->ADC_CHER =AT91C_ADC_CH5;
  AT91C_BASE_ADC->ADC_IDR=0xffffffff;
  //Seting PDC
  AT91C_BASE_ADC->ADC_PTCR=AT91C_PDC_RXTDIS|AT91C_PDC_TXTDIS;
  AT91C_BASE_ADC->ADC_RPR=(unsigned int)ADCbuf;
  AT91C_BASE_ADC->ADC_RCR=ADC_SIZE_BUF;

    
}
void StartADCSignal1()
{
    //ADC from line 1
    AT91C_BASE_ADC->ADC_CHDR =AT91C_ADC_CH5;
    AT91C_BASE_ADC->ADC_CHER =AT91C_ADC_CH4;
    TakesADC=true;
    AT91C_BASE_ADC->ADC_RPR=(unsigned int)ADCbuf;
    AT91C_BASE_ADC->ADC_RCR=ADC_SIZE_BUF;
    TC_Start(AT91C_BASE_TC0);
    while(TakesADC)
      AT91C_BASE_ADC->ADC_CR=AT91C_ADC_START;
    
}
void StartADCSignal2()
{
    //ADC from line 2
     AT91C_BASE_ADC->ADC_CHER =AT91C_ADC_CH5;
    AT91C_BASE_ADC->ADC_CHDR =AT91C_ADC_CH4;
     TakesADC=true;
    AT91C_BASE_ADC->ADC_RPR=(unsigned int)ADCbuf;
    AT91C_BASE_ADC->ADC_RCR=ADC_SIZE_BUF;
    TC_Start(AT91C_BASE_TC0);
    while(TakesADC)
      AT91C_BASE_ADC->ADC_CR=AT91C_ADC_START;
    
}

#define ADC_FREQ 5000000

#define ADC_SIZE_BUF 6000
unsigned short ADCbuf[ADC_SIZE_BUF];
bool TakesADC;


void ISR_Tc0()
{
    unsigned int status;
    // Read TC0 status
    status = AT91C_BASE_TC0->TC_SR;
    // RC compare
    if ((status & AT91C_TC_CPCS) == AT91C_TC_CPCS)
    {
      //Diseble TC0
      AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS;
      //RESET ADC
      AT91C_BASE_ADC->ADC_CR=AT91C_ADC_SWRST;
      //flag end adc
      TakesADC=false;
    }
}
void TC_Start(AT91S_TC *pTc)
{
    pTc->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
}
void InitTC0()
{
    /// Configure TC for a 10ms over TC0 4Ãö ç 400ÃÖ
    // Enable TC0 peripheral clock
    AT91C_BASE_PMC->PMC_PCER =(1 << AT91C_ID_TC0);
    // Disable TC clock
    AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS;
    // Disable interrupts
    AT91C_BASE_TC0->TC_IDR = 0xFFFFFFFF;
    // Clear status register
    AT91C_BASE_TC0->TC_SR;
    // Set mode
    AT91C_BASE_TC0->TC_CMR = AT91C_TC_CLKS_TIMER_DIV3_CLOCK;//div MCK 32
    AT91C_BASE_TC0->TC_RC  = 15017; // 10ms
  
    //Conf AICIntr
    AT91C_BASE_AIC->AIC_IDCR = (1 << AT91C_ID_TC0);// Disable the interrupt first
    AT91C_BASE_AIC->AIC_SMR[AT91C_ID_TC0] = 0; // Configure mode and handler
    AT91C_BASE_AIC->AIC_SVR[AT91C_ID_TC0] = (unsigned int)ISR_Tc0;
    AT91C_BASE_AIC->AIC_ICCR = (1 << AT91C_ID_TC0);// Clear interrupt

    //Eneble interupt for compare RC
    AT91C_BASE_TC0->TC_IER = AT91C_TC_CPCS; //interopt on of compare rc 10ìñ
    
    //Enebl AICIntr
    AT91C_BASE_AIC->AIC_IECR = (1 << AT91C_ID_TC0);
}

int main()
{
  LCD.SetLogo();
  InitModBus();
  InitADC();
  delay(1000*MS);
  AT91C_BASE_PIOA->PIO_PER=3;
  AT91C_BASE_PIOA->PIO_OER=3;
  
  AT91C_BASE_ADC->ADC_CHER =AT91C_ADC_CH5;
  while(1)
  {
    StartADCSigna2();
    WBufADC(1);
   //ModbusEIntr();
   // ModbusDIntr();
    AT91C_BASE_PIOA->PIO_CODR=1;
    AT91C_BASE_PIOA->PIO_SODR=2;
    StartADCSigna2();
    WBufADC(2);
    //delay(1000*MS);
    AT91C_BASE_PIOA->PIO_CODR=2;
    AT91C_BASE_PIOA->PIO_SODR=1;
  //  delay(1000*MS);
    
  }
}

//RESET ADC
AT91C_BASE_ADC->ADC_CR=AT91C_ADC_SWRST;

while(TakesADC)
      AT91C_BASE_ADC->ADC_CR=AT91C_ADC_START;