Цитата(Larionov @ Sep 16 2010, 05:19)
Дорисовал наконец то схему на EP2C8, вроде ошибок нет - но мало ли, всё таки в первый раз такое сочинял.
Вопрос по схеме: цепь RESET-а так можно делать ? Не попалю ли пин при закоротке на землю ?
Цитата
When the Cyclone II device is in user mode, you can initiate
reconfiguration by pulling the nCONFIG signal low. The nCONFIG signal
should be low for at least 2 μs. When nCONFIG is pulled low, the
Cyclone II device is reset and enters the reset stage. The Cyclone II device
also pulls nSTATUS and CONF_DONE low and all I/O pins are tri-stated.
Once nCONFIG returns to a logic high level and nSTATUS is released by
the Cyclone II device, reconfiguration begins.
Короче все ок, но смысла в этом нет.
Цитата
Upon power-up, the Cyclone II device goes through a POR. During POR,
the device resets, holds nSTATUS and CONF_DONE low, and tri-states all
user I/O pins. After POR, which typically lasts 100 ms, the Cyclone II
device releases nSTATUS and enters configuration mode when the
external 10-kΩ resistor pulls the nSTATUS pin high. Once the FPGA
successfully exits POR, all user I/O pins continue to be tri-stated.
Cyclone II devices have weak pull-up resistors on the user I/O pins
which are on before and during configuration.
Схема отладочной платы Cyclone EP2C8, Просьба глянуть на предмет "косяков"
Sep 16 2010, 02:19
