Ставили, проверили. Лучше бы не проверяли...

DATE: 01-14-2011 HOTFIX VERSION: 022
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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372240 CAPTURE SCHEMATIC_EDITOR Allow component move with connectivity change should be checked by default
769139 SIP_LAYOUT DRC_CONSTRAINTS Wire to Bond finger rule in the CM needs profile to profile constraint capability
772299 ALLEGRO_EDITOR GRAPHICS Via doesn't get highlighted properly with OpenGL disabled
830519 ALLEGRO_EDITOR GRAPHICS Disabling openGL causes highlihting problems.
833981 RF_PCB FE_IFF_IMPORT DE HDL Import IFF unit conversion and unit display in RF schematic
835698 RF_PCB FE_IFF_IMPORT DE HDL Import IFF to assign simple sig_names like RF001 RF002 etc
840094 RF_PCB OTHER dlibx2iff does not translate complex polygon pad
844504 SIG_EXPLORER INTERACTIV EMI Regulation setting of the board is not reflected correctly when the net is extracted into SigXP
846210 PDN_ANALYSIS PCB_STATICIRDROP IR Drop mesh is not correct.
846228 SIG_INTEGRITY OTHER ZAll and Wirebond calculation in the Prop Delay formula
846259 CONSTRAINT_MGR CONCEPT_HDL Why dont I see the P1_8V_DIG net in CM ?
847278 CAPTURE TCL_INTERFACE TCL/TK PDF Export Change Page Size
847942 SIG_EXPLORER OTHER The solder resist layer was not included in Interconnect Model of SigXP.
848181 PSPICE DEHDL Model association for concept symbols with a chips view doesnt work
849707 ALLEGRO_EDITOR MANUFACT Thieving creates unwanted thermal reliefs in this design.
851070 CONSTRAINT_MGR CONCEPT_HDL The Match Groups are not visible in the CM
851171 F2B PACKAGERXL Design will not package with exclude_cdsNotOnSym
851290 APD PADSTACK_EDITOR APD/SiP crashes when the user defined mask layer is edited with padeditdb.
851477 SPECCTRA ROUTE Allegro Router runs out of memory during route passes
851658 APD EDIT_ETCH bunceback behavior while slideing cline
851725 ALLEGRO_EDITOR DATABASE Number of DRC is not consistent on each DRC update.
851789 ALLEGRO_EDITOR SKILL Skill axlAirGap for Via & Text causes Allegro to crash
852325 ALLEGRO_EDITOR DATABASE Perf advisor doesn't check high pincount devices for RATSNEST_SCHEDULE
852360 SIG_INTEGRITY OTHER Appling toplogy template to a diff pair object reports UserDefined in CM
852395 ALLEGRO_EDITOR DRC_CONSTR Same net via spacing broken drc shows up to date
852764 ALLEGRO_EDITOR SKILL axlHttp beeps and gives error E - http 42
852787 CAPTURE ANNOTATE Tool is crashing during annotation if Ref Control is set
853110 ALLEGRO_EDITOR ARTWORK Allegro Crash on selecting Mfg > Artwork if any Parameter syntax is wrong in art_param.txt
854031 ALLEGRO_EDITOR MANUFACT The stream out data xxx.scf seems to be incorrect.
854246 ALLEGRO_EDITOR MANUFACT Stream out data of Oblong pad is strange.
854293 APD OTHER dynamic fillets were disappeared when open in 16.3.
854356 ALLEGRO_EDITOR OTHER Fillet adding doesn’t check same net spacing rule in both static and dynamic mode.
855101 ALLEGRO_EDITOR OTHER Drill figures now smaller than expected
855124 APD PLOTTING The "load plot" command did not import Drill symbols(Figure) and Characters in APD.
855348 ALLEGRO_EDITOR EDIT_ETCH Differential Pairs do not slide to correct geometry
856220 ALLEGRO_EDITOR INTERFACES Export DXF in the 16.3 S021 build rotates some pin locations
856256 SIP_LAYOUT WIREBOND When editing a single Wirebond all wirebonds attached to the finger get highlighted.
856674 ALLEGRO_EDITOR AUTOVOID drill hole to shape autovoiding clearence is wrong for Same Net Spacing

Вышел новый HOTFIX VERSION: SPB16.30.022.

Да не вопрос, уже в процессе, через пару часов можно будет скачать.

DATE: 01-28-2011 HOTFIX VERSION: 023
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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739067 SIG_INTEGRITY SIMULATION about modal delay of diff pair net
742237 CIS FOOTPRINT_VIEW 3D Footprint view in CIS Explorer
762702 CONCEPT_HDL CORE Unable to change color settings
800333 CONCEPT_HDL CORE Text change cursor not working on Solaris and Linux
837479 CONSTRAINT_MGR DATABASE Import dcf with custom column cuases a problem
846679 ALLEGRO_EDITOR SHAPE Through Pin can not be voided correctly in dynamic shape.
852255 CONCEPT_HDL COMP_BROWSER DEHDL crashes when adding part from cat file
855553 ALLEGRO_EDITOR DRC_CONSTR Multithreaded DRC shows different DRC counts
856459 SIG_INTEGRITY GEOMETRY_EXTRACT No waveform was output if users set the Via type to Analytical type
857030 SIG_INTEGRITY OTHER Inconsistency when signal model has "legal" spaces within it.
857120 APD WIREBOND Enhancement for Redistribute Fingers.
857165 SIG_INTEGRITY OTHER Model Name Changed Warning appears every time after Export Physical
857237 ALLEGRO_EDITOR SCHEM_FTB UserDefined mapping mode
857650 ALLEGRO_EDITOR DRC_CONSTR Hole to line DRC unavailable on inner layers for mechanical pin with no regular pad definition.
858046 MODEL_INTEGRIT TRANSLATION Ibis2signoise fails translation when the unit of Pin section is "ohms".
858154 GRE DETAIL Net not following the plan during Plan Topological
858192 SIP_LAYOUT SHAPE Program crashes when attempting to add polygon shape.
858307 CIS DESIGN_VARIANT Homogenous part not showing correct DNI on schematic
858624 ALLEGRO_EDITOR PAD_EDITOR "Save Padstack to 16.2" command is needed in 16.3 pad_designer.
858814 ALLEGRO_EDITOR MODULES place module not placing figures present in mdd
859514 APD IMPORT_DATA Die Text-in cannot change unnamed Begin Layer to selected pad layer in step 4
859640 ALLEGRO_EDITOR PLOTTING Shape based pads not output as polygon in IPF
859680 ALLEGRO_EDITOR DRC_CONSTR Multithreaded DRC shows different DRC counts
860069 ALLEGRO_EDITOR OTHER Import Logic hangs then crashes and displays Netrev warnings.
860535 APD DXF_IF a2dxf got an error message
860860 CONCEPT_HDL COMP_BROWSER Component Browser freezes
861295 CONSTRAINT_MGR ECS_APPLY Diff pair PCSet value overrides ECSet values in constraint manager spreadsheet.
862279 SPIF OTHER running 'Allegro PCB Router' Crashes

Что-то они зачастили... Праздники закончились, можно и поработать?