Привожу мою переписку с тех. службой ATMEL, хотя они на последнее мое письмо не ответили и я решил проблему(хоть и не полностью).
I am trying to launch TWI in slave mode, but I have some problems.
First of all I would like to say that datasheet on SAM3U series has some mistakes in chapter of description slave mode:
1. Bit SVREAD in the TWI_SR indicates the direction of the transfer. 1- indicates that a read access is performed by a Master, 0-indicates that a write access is performed by a Master, according to description on page 656. If you look at example of read and write operations in Slave mode on fig. 33-32, page 647, you can notice that the work of SVREAD is wrong.
2. Bit RXRDY in the TWI_SR indicates that character has been received in the TWI_RHR, and software can read it, 1- a byte has been received in the TWI_RHR since the last read, 0- no character has been received since the last TWI_RHR read operation, it is according to description on page 655, but on fig. 33-32, page 647 this bit works wrong.
As for work of TWI in Slave mode, there are two strangeness:
1. After getting SADR+R has been received, sam3u sends ASK-this is normal, and I have to put byte into register transfer TWI_THR. I am doing it, but depending on the value of byte, sam3u (slave) locks SDA line in "0" or unlocks in "1". How do slave can hold the line SDA?
On the picture 1.bmp is correct behavior of sam3u. I put 0xFF in TWI_THR in after SADR+R. On the picture 2.bmp you can see what happens if I put another byte (not 0xFF) in TWI_THR in after SADR+R, for example 0x01.(SADR=10)
What should I do to make sam3u works correctly with any bytes as shown in 1 picture?
2. I use the interrupt method for the handle of TWI. My first interrupt occurs when SADR+W/R has been received, TWI_IER= SVACC and TWI_SR=0xF01C. In the body of handler interrupt I switch off SVACC in TWI_IDR and change TWI_IER = TXRDY | EOSACC (for example). After exit from interruption I get back in the handler of interrupt second time, and TWI_SR=0xF018, although this should not happen. According to TWI_IMR and TWI_IER values I have to come in the interrupt when a flag TXRDY or EOSACC set in TWI_SR. My third interruption is correct, because TXRDY or EOSACC set in TWI_SR.
I cannot understand why second interruption occurs. What should I do to fix it?
Их ответ:
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You are right regarding the flowchart. I asked to modify it, thanks for the feedback.
Regrading the 2 questions you have:
1. I don't see any obvious reason why the SDA line is not released. I you could provide your code I could have more inputs to give.
2. Do you write some data in the TWI_THR in your interrupt handler? If no the TXRDY flag could be set to 1, that is why you see the second interrupt.
If you could send the code of the interrupt handler that would be helpful.
Thanks,
Best Regards,
Guylain Pouly
Atmel Technical Support Team
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мое 2 письмо:
Have a nice day.
Guylain, thanks for your reply.
In the attachment you can find the code.
Maybe I am making something wrong, but I've tried a lot of variants to solve
problems. The code which is attached is a final version, but it also has the
same problems. I think, the main trouble is not release the SDA line, after
ASK. As I can understand the slave device (sam3u) is waiting clock from the
master when I put the byte in TWI_THR, and hold SDA in null.
Waiting for your reply!
Вот уже три недели жду ответа нет.
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Прикрепленные файлы
1.bmp ( 19 килобайт )
Кол-во скачиваний: 1
2.BMP ( 18.69 килобайт )
Кол-во скачиваний: 2 
TWI_code.txt ( 6.69 килобайт )
Кол-во скачиваний: 112
SAM3U и I2C, как slave работает не правильно.
Jun 1 2011, 11:33
это грустно.