Пытаюсь собрать системку с MicroBlaze на Virtex-4 XC4VLX80. XPS собирает платформу нормально. Использую только BRAM.
Затем, при попытке собрать прошивку вот так ругается:
Код
ERROR:Data2MEM:47 - Not all BitLanes in ADDRESS_SPACE 'microblaze_0.bram_block_0_combined' have BMM location constraints.
Some data for this ADDRESS_SPACE may be lost during BIT file
replacement. Verify that the BMM file has location constraints
for all BitLanes.
Bitlane(s)
----------------
bram_block_0/bram_block_0/ramb16_0 [31:31]
bram_block_0/bram_block_0/ramb16_1 [30:30]
bram_block_0/bram_block_0/ramb16_2 [29:29]
bram_block_0/bram_block_0/ramb16_3 [28:28]
bram_block_0/bram_block_0/ramb16_4 [27:27]
bram_block_0/bram_block_0/ramb16_5 [26:26]
bram_block_0/bram_block_0/ramb16_6 [25:25]
bram_block_0/bram_block_0/ramb16_7 [24:24]
bram_block_0/bram_block_0/ramb16_8 [23:23]
bram_block_0/bram_block_0/ramb16_9 [22:22]
bram_block_0/bram_block_0/ramb16_10 [21:21]
bram_block_0/bram_block_0/ramb16_11 [20:20]
bram_block_0/bram_block_0/ramb16_12 [19:19]
bram_block_0/bram_block_0/ramb16_13 [18:18]
bram_block_0/bram_block_0/ramb16_14 [17:17]
bram_block_0/bram_block_0/ramb16_15 [16:16]
bram_block_0/bram_block_0/ramb16_16 [15:15]
bram_block_0/bram_block_0/ramb16_17 [14:14]
bram_block_0/bram_block_0/ramb16_18 [13:13]
bram_block_0/bram_block_0/ramb16_19 [12:12]
bram_block_0/bram_block_0/ramb16_20 [11:11]
bram_block_0/bram_block_0/ramb16_21 [10:10]
bram_block_0/bram_block_0/ramb16_22 [9:9]
bram_block_0/bram_block_0/ramb16_23 [8:8]
bram_block_0/bram_block_0/ramb16_24 [7:7]
bram_block_0/bram_block_0/ramb16_25 [6:6]
bram_block_0/bram_block_0/ramb16_26 [5:5]
bram_block_0/bram_block_0/ramb16_27 [4:4]
bram_block_0/bram_block_0/ramb16_28 [3:3]
bram_block_0/bram_block_0/ramb16_29 [2:2]
bram_block_0/bram_block_0/ramb16_30 [1:1]
bram_block_0/bram_block_0/ramb16_31 [0:0]
FPGA Programming Failed due to errors while initializing bitstream.
Я не могу понять, как собственно должен выглядеть этот файл

(он его сгенерил автоматически).
Вот его содержание:
Код
// BMM LOC annotation file.
//
// Release 12.2 - Data2MEM M.63c, build 1.7 Jun 25, 2010
// Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved.
///////////////////////////////////////////////////////////////////////////////
//
// Processor 'microblaze_0', ID 100, memory map.
//
///////////////////////////////////////////////////////////////////////////////
ADDRESS_MAP microblaze_0 MICROBLAZE 100
///////////////////////////////////////////////////////////////////////////////
//
// Processor 'microblaze_0' address space 'bram_block_0_combined' 0x00000000:0x0000FFFF (64 KBytes).
//
///////////////////////////////////////////////////////////////////////////////
ADDRESS_SPACE bram_block_0_combined RAMB16 [0x00000000:0x0000FFFF]
BUS_BLOCK
bram_block_0/bram_block_0/ramb16_0 [31:31] INPUT = bram_block_0_combined_0.mem;
bram_block_0/bram_block_0/ramb16_1 [30:30] INPUT = bram_block_0_combined_1.mem;
bram_block_0/bram_block_0/ramb16_2 [29:29] INPUT = bram_block_0_combined_2.mem;
bram_block_0/bram_block_0/ramb16_3 [28:28] INPUT = bram_block_0_combined_3.mem;
bram_block_0/bram_block_0/ramb16_4 [27:27] INPUT = bram_block_0_combined_4.mem;
bram_block_0/bram_block_0/ramb16_5 [26:26] INPUT = bram_block_0_combined_5.mem;
bram_block_0/bram_block_0/ramb16_6 [25:25] INPUT = bram_block_0_combined_6.mem;
bram_block_0/bram_block_0/ramb16_7 [24:24] INPUT = bram_block_0_combined_7.mem;
bram_block_0/bram_block_0/ramb16_8 [23:23] INPUT = bram_block_0_combined_8.mem;
bram_block_0/bram_block_0/ramb16_9 [22:22] INPUT = bram_block_0_combined_9.mem;
bram_block_0/bram_block_0/ramb16_10 [21:21] INPUT = bram_block_0_combined_10.mem;
bram_block_0/bram_block_0/ramb16_11 [20:20] INPUT = bram_block_0_combined_11.mem;
bram_block_0/bram_block_0/ramb16_12 [19:19] INPUT = bram_block_0_combined_12.mem;
bram_block_0/bram_block_0/ramb16_13 [18:18] INPUT = bram_block_0_combined_13.mem;
bram_block_0/bram_block_0/ramb16_14 [17:17] INPUT = bram_block_0_combined_14.mem;
bram_block_0/bram_block_0/ramb16_15 [16:16] INPUT = bram_block_0_combined_15.mem;
bram_block_0/bram_block_0/ramb16_16 [15:15] INPUT = bram_block_0_combined_16.mem;
bram_block_0/bram_block_0/ramb16_17 [14:14] INPUT = bram_block_0_combined_17.mem;
bram_block_0/bram_block_0/ramb16_18 [13:13] INPUT = bram_block_0_combined_18.mem;
bram_block_0/bram_block_0/ramb16_19 [12:12] INPUT = bram_block_0_combined_19.mem;
bram_block_0/bram_block_0/ramb16_20 [11:11] INPUT = bram_block_0_combined_20.mem;
bram_block_0/bram_block_0/ramb16_21 [10:10] INPUT = bram_block_0_combined_21.mem;
bram_block_0/bram_block_0/ramb16_22 [9:9] INPUT = bram_block_0_combined_22.mem;
bram_block_0/bram_block_0/ramb16_23 [8:8] INPUT = bram_block_0_combined_23.mem;
bram_block_0/bram_block_0/ramb16_24 [7:7] INPUT = bram_block_0_combined_24.mem;
bram_block_0/bram_block_0/ramb16_25 [6:6] INPUT = bram_block_0_combined_25.mem;
bram_block_0/bram_block_0/ramb16_26 [5:5] INPUT = bram_block_0_combined_26.mem;
bram_block_0/bram_block_0/ramb16_27 [4:4] INPUT = bram_block_0_combined_27.mem;
bram_block_0/bram_block_0/ramb16_28 [3:3] INPUT = bram_block_0_combined_28.mem;
bram_block_0/bram_block_0/ramb16_29 [2:2] INPUT = bram_block_0_combined_29.mem;
bram_block_0/bram_block_0/ramb16_30 [1:1] INPUT = bram_block_0_combined_30.mem;
bram_block_0/bram_block_0/ramb16_31 [0:0] INPUT = bram_block_0_combined_31.mem;
END_BUS_BLOCK;
END_ADDRESS_SPACE;
END_ADDRESS_MAP;
Подскажите пожалуйста, что нужно поправить в этом файле.
Спасибо!