У меня оверлейная функция должна быть размещена во внешней памяти (DSM)(c адреса 0x10000), после линковки она располагается в hex файле сразу после основной программы. Вопрос: как вытащить оверлейную функцию и расположить её во внешней памяти с адреса 0x10000 ?
Я так подозреваю что в LDF файле что-то неправильно или в линкере ключик какой-то нужно запользовать, но только ничего подходящего не нашёл, еще есть версия -может быть из оверлейного файла можно отдельный НЕХ-файл сделать?
Прилагаю LDF:
// $Revision: 1.1.2.1 $
ARCHITECTURE(ADSP-21992)
SEARCH_DIR( $ADI_DSP\219x\lib )
// ADSP-21992 Memory Map (Internal) // // Block Start Address End Address Page Content // =================================================== // 0 0x00 0000 0x00 7fff 0 24 Bit Program Memory RAM // 1 0x00 8000 0x00 bfff 0 16 Bit Data Memory RAM
// libsim provides fast, mostly host emulated IO only supported by // the simulator. The libio library provides IO processing mostly // done by the 219X target that is supported by the emulator and // simulator. Libio is the default used, but if __USING_LIBSIM is // defined libsim will be used. // from the driver command line, use options, // "-flags-link -MD__USING_LIBSIM=1" // in the ide, add -MD__USING_LIBSIM=1 to the linker additional // options
#ifdef __USING_LIBSIM $IOLIB = libsim.dlb; #else // !__USING_LIBSIM $IOLIB = libio.dlb; #endif // __USING_LIBSIM
$CLIBS = libc.dlb, libdsp.dlb, libetsi.dlb;
// EZ-Kits: // The linker, upon invocation, will determine if the user has a restricted // license or not. If the user has a restricted license, the preprocessor // macro __EZKIT_LICENSE_RESTRICTION_21xx__ shall be defined. This default // LDFs uses this macro to support linkage with a restricted licenses. // Furthermore, for those EZ-Kits that require an on-target monitor program, // the LDF will also ensure that this monitor is not overwritten by the users // executable image. $OBJECTS = $COMMAND_LINE_OBJECTS;
// Libraries from the command line are included in COMMAND_LINE_OBJECTS. $LIBRARIES = $IOLIB, $CLIBS;
// memory map: // This memory map is set up to facilite testing of the tool // chain -- code and data area are as large as possible. Code // is placed in page 0, starting with space reserved for the // interrupt table. All data is placed in page 1. Note that // the run time header must initialize the data page registers // to zero to match this placement of program data. All pages are // 64K words.
MEMORY { // The memory section where the reset vector resides mem_INT_RSTI { TYPE(PM RAM) START(0x000000) END(0x00001f) WIDTH(24) }
// The memory sections where the interrupt vector code and an // interrupt table used by library functions resides. The // library functions concerned include signal(), interrupt(), // raise(), and clear_interrupts() mem_INT_PWRDWN { TYPE(PM RAM) START(0x000020) END(0x00003f) WIDTH(24) } mem_INT_KERNEL { TYPE(PM RAM) START(0x000040) END(0x00005f) WIDTH(24) } mem_INT_STKI { TYPE(PM RAM) START(0x000060) END(0x00007f) WIDTH(24) } mem_INT_INT4 { TYPE(PM RAM) START(0x000080) END(0x00009f) WIDTH(24) } mem_INT_INT5 { TYPE(PM RAM) START(0x0000a0) END(0x0000bf) WIDTH(24) } mem_INT_INT6 { TYPE(PM RAM) START(0x0000c0) END(0x0000df) WIDTH(24) } mem_INT_INT7 { TYPE(PM RAM) START(0x0000e0) END(0x0000ff) WIDTH(24) } mem_INT_INT8 { TYPE(PM RAM) START(0x000100) END(0x00011f) WIDTH(24) } mem_INT_INT9 { TYPE(PM RAM) START(0x000120) END(0x00013f) WIDTH(24) } mem_INT_INT10 { TYPE(PM RAM) START(0x000140) END(0x00015f) WIDTH(24) } mem_INT_INT11 { TYPE(PM RAM) START(0x000160) END(0x00017f) WIDTH(24) } mem_INT_INT12 { TYPE(PM RAM) START(0x000180) END(0x00019f) WIDTH(24) } mem_INT_INT13 { TYPE(PM RAM) START(0x0001a0) END(0x0001bf) WIDTH(24) } mem_INT_INT14 { TYPE(PM RAM) START(0x0001c0) END(0x0001df) WIDTH(24) } mem_INT_INT15 { TYPE(PM RAM) START(0x0001e0) END(0x0001ff) WIDTH(24) } mem_itab { TYPE(PM RAM) START(0x000200) END(0x000241) WIDTH(24) }
#ifdef __EZKIT_LICENSE_RESTRICTION_21xx__ // see comments above wrt this macro // The license that is shipped with the EZ-KIT Lite imposes a // Program Memory (PM) limitation. mem_code { TYPE(PM RAM) START(0x000242) END(0x001dff) WIDTH(24) } mem_data2 { TYPE(PM RAM) START(0x001e00) END(0x001fff) WIDTH(24) } #else // !__EZKIT_LICENSE_RESTRICTION_21xx__ // mem_code { TYPE(PM RAM) START(0x000242) END(0x0079ff) WIDTH(24) }
mem_code { TYPE(PM RAM) START(0x000242) END(0x0069ff) WIDTH(24) } ovlrun_blk { TYPE(PM RAM) START(0x06A00) END(0x070ff) WIDTH(24) } mem_data2 { TYPE(PM RAM) START(0x007100) END(0x007fff) WIDTH(24) } #endif // __EZKIT_LICENSE_RESTRICTION_21xx__
mem_heap { TYPE(DM RAM) START(0x008000) END(0x0083ff) WIDTH(16) }
mem_stack { TYPE(DM RAM) START(0x008400) END(0x0086ff) WIDTH(16) }
mem_data1 { TYPE(DM RAM) START(0x008700) END(0x00bfef) WIDTH(16) } ovlstore_blk { TYPE(PM RAM) START(0x10001) END(0x001ffff) WIDTH(8)}
} // end of memory map
PLIT { ax0 = PLIT_SYMBOL_OVERLAYID; /* overlay number */ ljump over_man; /* call overlay manager */ }
PROCESSOR p0 //SHARED_MEMORY {
$BOOT_MODULE = Manager.doj; $ROOT_OBJECTS = Manager.doj;
LINK_AGAINST( $COMMAND_LINE_LINK_AGAINST) OUTPUT( $COMMAND_LINE_OUTPUT_FILE )
SECTIONS {
IVreset_dxe { INPUT_SECTIONS( $OBJECTS(IVreset) $LIBRARIES(IVreset) ) } > mem_INT_RSTI
IVpwrdwn_dxe { INPUT_SECTIONS( $OBJECTS(IVpwrdwn) $LIBRARIES(IVpwrdwn) ) } > mem_INT_PWRDWN
IVstackint_dxe { INPUT_SECTIONS( $OBJECTS(IVstackint) $LIBRARIES(IVstackint) ) } > mem_INT_STKI
IVkernel_dxe { INPUT_SECTIONS( $OBJECTS(IVkernel) $LIBRARIES(IVkernel) ) } > mem_INT_KERNEL
IVint4_dxe { INPUT_SECTIONS( $OBJECTS(IVint4) $LIBRARIES(IVint4) ) } > mem_INT_INT4
IVint5_dxe { INPUT_SECTIONS( $OBJECTS(IVint5) $LIBRARIES(IVint5) ) } > mem_INT_INT5
IVint6_dxe { INPUT_SECTIONS( $OBJECTS(IVint6) $LIBRARIES(IVint6) ) } > mem_INT_INT6
IVint7_dxe { INPUT_SECTIONS( $OBJECTS(IVint7) $LIBRARIES(IVint7) ) } > mem_INT_INT7
IVint8_dxe { INPUT_SECTIONS( $OBJECTS(IVint8) $LIBRARIES(IVint8) ) } > mem_INT_INT8
IVint9_dxe { INPUT_SECTIONS( $OBJECTS(IVint9) $LIBRARIES(IVint9) ) } > mem_INT_INT9
IVint10_dxe { INPUT_SECTIONS( $OBJECTS(IVint10) $LIBRARIES(IVint10) ) } > mem_INT_INT10
IVint11_dxe { INPUT_SECTIONS( $OBJECTS(IVint11) $LIBRARIES(IVint11) ) } > mem_INT_INT11
IVint12_dxe { INPUT_SECTIONS( $OBJECTS(IVint12) $LIBRARIES(IVint12) ) } > mem_INT_INT12
IVint13_dxe { INPUT_SECTIONS( $OBJECTS(IVint13) $LIBRARIES(IVint13) ) } > mem_INT_INT13
IVint14_dxe { INPUT_SECTIONS( $OBJECTS(IVint14) $LIBRARIES(IVint14) ) } > mem_INT_INT14
IVint15_dxe { INPUT_SECTIONS( $OBJECTS(IVint15) $LIBRARIES(IVint15) ) } > mem_INT_INT15
lib_int_table_dxe { INPUT_SECTIONS( $OBJECTS(lib_int_table) $LIBRARIES(lib_int_table) ) } > mem_itab
program_dxe { INPUT_SECTIONS( $OBJECTS(program) $LIBRARIES(program) ) } > mem_code
/* Create the overlay branches. The section name is a don't care. For each of the overlays: -- Create overlay branch, one for each overlay. -- Write it out to file ovl1.ovl for overlay 1, ovl2.ovl for overlay 2... Use a pathname or the linker will write the *.ovl output files to the current directory which is probably not what you want. -- Get the code from ovl*.doj .SECTION "program". -- Store it in ovlstore_blk. */
// sec_reserved_blk { // INPUT_SECTIONS( $OBJECTS(program) $LIBRARIES(program) ) } // > reserved_blk //ovlrun_blk
dont_care_2 { OVERLAY_INPUT { OVERLAY_OUTPUT ($COMMAND_LINE_OUTPUT_DIRECTORY\ovl1.ovl) INPUT_SECTIONS (ovl1.doj(programovl1)) ALGORITHM(ALL_FIT) // RESOLVE_LOCALLY (FALSE) } >ovlstore_blk
OVERLAY_INPUT { OVERLAY_OUTPUT ($COMMAND_LINE_OUTPUT_DIRECTORY\ovl2.ovl) INPUT_SECTIONS (ovl2.doj(programovl2)) ALGORITHM(ALL_FIT) // RESOLVE_LOCALLY (FALSE) } >ovlstore_blk
OVERLAY_INPUT { OVERLAY_OUTPUT ($COMMAND_LINE_OUTPUT_DIRECTORY\ovl3.ovl) INPUT_SECTIONS (ovl3.doj(programovl3)) ALGORITHM(ALL_FIT) // RESOLVE_LOCALLY (FALSE) } >ovlstore_blk
} > ovlrun_blk // Link overlays to run in ovlrun_blk
/* Create the Program Linkage Table (PLIT). Put it into rootcode_blk. .plit MUST be lower case, the linker is case sensitive. */
.plit {} > mem_code
data1_dxe { INPUT_SECTIONS( $OBJECTS(data1) $LIBRARIES(data1) ) } > mem_data1
data2_dxe { INPUT_SECTIONS( $OBJECTS(data2) $LIBRARIES(data2) ) } > mem_data2
// provide linker variables describing the stack (grows down) // ldf_stack_limit is the lowest address in the stack // ldf_stack_base is the highest address in the stack sec_stack { ldf_stack_limit = .; ldf_stack_base = . + MEMORY_SIZEOF(mem_stack) - 1; } > mem_stack
sec_heap { .heap = .; .heap_size = MEMORY_SIZEOF(mem_heap); .heap_end = . + MEMORY_SIZEOF(mem_heap) - 1; } > mem_heap
} // SECTIONS
} // PROCESSOR p0
// end of file
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