Implementation of Scrambler for PCI Express Опции

[keshu]

HI All,

Can any one help me implement Scrambler/Descrambler for PCI Express. The data path is 16 bits wide.

The standard shows scrambler that has datapath as 8 bits. Now in my design as the data path is 16 bits the scrambler needs to be modified, so that it can be designed as 2 paralled 8 bit scramblers working together.

Can any one give pointers to this kind of design.

can anyone upload this paper

The Algorithm of 16-Bit Scrambler in Parallel for PCI Express
W.-O. Kwon, K. Park, M.-J. Kim, and H.-J. Kwon (Korea)

h**p://w*w.actapress.com/PaperInfo.aspx?PaperID=21467


Thanks,
keshu

[Link]

Scrambling with 16 bits data path similar the 8 bit one. You just have to calculate twice the scrambled data for one tact. For example:

----------------------
Clock process:

DATA_scrambled(15) <= DATA(15) xor Scr_Temp0(08);
DATA_scrambled(14) <= DATA(14) xor Scr_Temp0(09);
DATA_scrambled(13) <= DATA(13) xor Scr_Temp0(10);
DATA_scrambled(12) <= DATA(12) xor Scr_Temp0(11);
DATA_scrambled(11) <= DATA(11) xor Scr_Temp0(12);
DATA_scrambled(10) <= DATA(10) xor Scr_Temp0(13);
DATA_scrambled(9) <= DATA(9) xor Scr_Temp0(14);
DATA_scrambled(8) <= DATA(8) xor Scr_Temp0(15);

DATA_scrambled(7) <= DATA(7) xor Scr_Temp1(08);
DATA_scrambled(6) <= DATA(6) xor Scr_Temp1(09);
DATA_scrambled(5) <= DATA(5) xor Scr_Temp1(10);
DATA_scrambled(4) <= DATA(4) xor Scr_Temp1(11);
DATA_scrambled(3) <= DATA(3) xor Scr_Temp1(12);
DATA_scrambled(2) <= DATA(2) xor Scr_Temp1(13);
DATA_scrambled(1) <= DATA(1) xor Scr_Temp1(14);
DATA_scrambled(0) <= DATA(0) xor Scr_Temp1(15);

Scr_Temp0 <= Scr_Temp2; -- in case where you have to advance LSFR 16 bits
Scr_Temp0 <= Scr_Temp1; -- in case where you have to advance LSFR 8 bits

end clock process;

----------------



----------------------------------------------------------------
SCRAMBLING_CALCULATE_Temp_PROC: process(RST, Scr_Temp0, Scr_Temp1)
begin

if RST='1' then
Scr_Temp1 <= x"FFFF";
Scr_Temp2 <= x"E817";
else

Scr_Temp1(0) <= Scr_Temp0(8);
Scr_Temp1(1) <= Scr_Temp0(9);
Scr_Temp1(2) <= Scr_Temp0(10);
Scr_Temp1(3) <= Scr_Temp0(11) xor Scr_Temp0(8);
Scr_Temp1(4) <= Scr_Temp0(12) xor Scr_Temp0(9) xor Scr_Temp0(8);
Scr_Temp1(5) <= Scr_Temp0(13) xor Scr_Temp0(10) xor Scr_Temp0(9) xor Scr_Temp0(8);
Scr_Temp1(6) <= Scr_Temp0(14) xor Scr_Temp0(11) xor Scr_Temp0(10) xor Scr_Temp0(9);
Scr_Temp1(7) <= Scr_Temp0(15) xor Scr_Temp0(12) xor Scr_Temp0(11) xor Scr_Temp0(10);
Scr_Temp1(8) <= Scr_Temp0(0) xor Scr_Temp0(13) xor Scr_Temp0(12) xor Scr_Temp0(11);
Scr_Temp1(9) <= Scr_Temp0(1) xor Scr_Temp0(14) xor Scr_Temp0(13) xor Scr_Temp0(12);
Scr_Temp1(10) <= Scr_Temp0(2) xor Scr_Temp0(15) xor Scr_Temp0(14) xor Scr_Temp0(13);
Scr_Temp1(11) <= Scr_Temp0(3) xor Scr_Temp0(15) xor Scr_Temp0(14);
Scr_Temp1(12) <= Scr_Temp0(4) xor Scr_Temp0(15);
Scr_Temp1(13) <= Scr_Temp0(5);
Scr_Temp1(14) <= Scr_Temp0(6);
Scr_Temp1(15) <= Scr_Temp0(7);

Scr_Temp2(0) <= Scr_Temp1(8);
Scr_Temp2(1) <= Scr_Temp1(9);
Scr_Temp2(2) <= Scr_Temp1(10);
Scr_Temp2(3) <= Scr_Temp1(11) xor Scr_Temp1(8);
Scr_Temp2(4) <= Scr_Temp1(12) xor Scr_Temp1(9) xor Scr_Temp1(8);
Scr_Temp2(5) <= Scr_Temp1(13) xor Scr_Temp1(10) xor Scr_Temp1(9) xor Scr_Temp1(8);
Scr_Temp2(6) <= Scr_Temp1(14) xor Scr_Temp1(11) xor Scr_Temp1(10) xor Scr_Temp1(9);
Scr_Temp2(7) <= Scr_Temp1(15) xor Scr_Temp1(12) xor Scr_Temp1(11) xor Scr_Temp1(10);
Scr_Temp2(8) <= Scr_Temp1(0) xor Scr_Temp1(13) xor Scr_Temp1(12) xor Scr_Temp1(11);
Scr_Temp2(9) <= Scr_Temp1(1) xor Scr_Temp1(14) xor Scr_Temp1(13) xor Scr_Temp1(12);
Scr_Temp2(10) <= Scr_Temp1(2) xor Scr_Temp1(15) xor Scr_Temp1(14) xor Scr_Temp1(13);
Scr_Temp2(11) <= Scr_Temp1(3) xor Scr_Temp1(15) xor Scr_Temp1(14);
Scr_Temp2(12) <= Scr_Temp1(4) xor Scr_Temp1(15);
Scr_Temp2(13) <= Scr_Temp1(5);
Scr_Temp2(14) <= Scr_Temp1(6);
Scr_Temp2(15) <= Scr_Temp1(7);

end if;

end process;

[keshu]

Thank you for the solutio!!,

Also can you also give me solutions on COMM arrival, SKIP arrival or any other Ordered set or data character be it on LSB or MSB of a Lane.

Thanks