Spartan 6 + Fast Ethernet, ISE UCF Опции

[Alexsandr000]

Уважаемые форумчане!

Вот осваиваю гигабитный Ethernet на Spartan 6. На ISE при работе с 100 Мб все ок, что-то я не пойму, что надо в констрейнах указывать

Код

NET "clk_125MHz_in" TNM_NET = sys_clk_pin;
TIMESPEC TS_sys_clk_pin = PERIOD sys_clk_pin 125000 kHz;

NET "rx_clk" TNM_NET = rx_clk;
TIMESPEC rx_clk = PERIOD "rx_clk" 125 MHz HIGH 50%;

INST "rx_data*" TNM = PHY_RX_SIGS;
TIMEGRP "PHY_RX_SIGS" OFFSET = IN 2.4 ns VALID 2.8 ns BEFORE "rx_clk" RISING;

NET "clk_125MHz_in" LOC = AA12 | IOSTANDARD = LVCMOS33;
NET "gtxclk_out"    LOC = R11 |SLEW=FAST |DRIVE=8  | IOSTANDARD = LVCMOS33;
NET "rx_clk"     LOC = Y11  | IOSTANDARD = LVCMOS33;
NET "rx_data[0]" LOC = Y3   | IOSTANDARD = LVCMOS33;
NET "rx_data[1]" LOC = W8   | IOSTANDARD = LVCMOS33;
NET "rx_data[2]" LOC = W4   | IOSTANDARD = LVCMOS33;
NET "rx_data[3]" LOC = U9   | IOSTANDARD = LVCMOS33;
NET "rx_data[4]" LOC = V7   | IOSTANDARD = LVCMOS33;
NET "rx_data[5]" LOC = V5   | IOSTANDARD = LVCMOS33;
NET "rx_data[6]" LOC = W9   | IOSTANDARD = LVCMOS33;
NET "rx_data[7]" LOC = U6   | IOSTANDARD = LVCMOS33;
NET "rx_en"      LOC = Y4   | IOSTANDARD = LVCMOS33;
NET "rx_er"      LOC = Y8   | IOSTANDARD = LVCMOS33;
NET "mdclk"      LOC = AA2  | IOSTANDARD = LVCMOS33;
NET "mdio"       LOC = AB3  | IOSTANDARD = LVCMOS33;
NET "MII_TX_CLK" LOC = W12  |  IOSTANDARD = LVCMOS33;
NET "res_eth"    LOC = T15  | IOSTANDARD = LVCMOS33

Кто может подсказать?

Сообщение отредактировал Alexsandr000 - Sep 30 2013, 08:11

[Sanchos]

С празниками всех форумчан! Успехов и удачи в НГ!
Просветите пожалуйста по поводу констрейнов для 1G ethernet на Spartan6 + 88E1111 GMII. Я так понимаю, что я задаю Тsetup 2.4 ns и Thold 0.4 ns. А что получаю в действительности? Что такое Slack (setup path): -0.441ns?
В общем каша в голове! Хелп!


Timing constraint: TIMEGRP "IN_GMII" OFFSET = IN 2.4 ns VALID 2.8 ns BEFORE
COMP "gmii_rx_clk";

10 paths analyzed, 10 endpoints analyzed, 10 failing endpoints
10 timing errors detected. (10 setup errors, 0 hold errors)
Minimum allowable offset is 2.841ns.
--------------------------------------------------------------------------------

Paths for end point trimac_locallink/trimac_block/gmii_interface/rx_dv_to_mac (ILOGIC_X18Y18.DDLY), 1 path
--------------------------------------------------------------------------------
Slack (setup path): -0.441ns (requirement - (data path - clock path - clock arrival + uncertainty))
Source: gmii_rx_dv (PAD)
Destination: trimac_locallink/trimac_block/gmii_interface/rx_dv_to_mac (FF)
Destination Clock: trimac_locallink/trimac_block/gmii_interface/gmii_rx_clk_bufio rising at 0.000ns
Requirement: 2.400ns
Data Path Delay: 5.042ns (Levels of Logic = 3)(Component delays alone exceeds constraint)
Clock Path Delay: 2.226ns (Levels of Logic = 2)
Clock Uncertainty: 0.025ns

Clock Uncertainty: 0.025ns ((TSJ^2 + TIJ^2)^1/2 + DJ) / 2 + PE
Total System Jitter (TSJ): 0.050ns
Total Input Jitter (TIJ): 0.000ns
Discrete Jitter (DJ): 0.000ns
Phase Error (PE): 0.000ns


Setup/Hold to clock gmii_rx_clk
------------+------------+------------+------------+------------+--------------------------------------------------------------+--------+
|Max Setup to| Process |Max Hold to | Process | | Clock |
Source | clk (edge) | Corner | clk (edge) | Corner |Internal Clock(s) | Phase |
------------+------------+------------+------------+------------+--------------------------------------------------------------+--------+
gmii_rx_dv | 2.841®| SLOW | -0.190®| FAST |trimac_locallink/trimac_block/gmii_interface/gmii_rx_clk_bufio| 0.000|
gmii_rx_er | 2.829®| SLOW | -0.178®| FAST |trimac_locallink/trimac_block/gmii_interface/gmii_rx_clk_bufio| 0.000|
gmii_rxd<0> | 2.836®| SLOW | -0.185®| FAST |trimac_locallink/trimac_block/gmii_interface/gmii_rx_clk_bufio| 0.000|
gmii_rxd<1> | 2.836®| SLOW | -0.185®| FAST |trimac_locallink/trimac_block/gmii_interface/gmii_rx_clk_bufio| 0.000|
gmii_rxd<2> | 2.836®| SLOW | -0.185®| FAST |trimac_locallink/trimac_block/gmii_interface/gmii_rx_clk_bufio| 0.000|
gmii_rxd<3> | 2.829®| SLOW | -0.178®| FAST |trimac_locallink/trimac_block/gmii_interface/gmii_rx_clk_bufio| 0.000|
gmii_rxd<4> | 2.829®| SLOW | -0.178®| FAST |trimac_locallink/trimac_block/gmii_interface/gmii_rx_clk_bufio| 0.000|
gmii_rxd<5> | 2.829®| SLOW | -0.178®| FAST |trimac_locallink/trimac_block/gmii_interface/gmii_rx_clk_bufio| 0.000|
gmii_rxd<6> | 2.829®| SLOW | -0.178®| FAST |trimac_locallink/trimac_block/gmii_interface/gmii_rx_clk_bufio| 0.000|
gmii_rxd<7> | 2.829®| SLOW | -0.178®| FAST |trimac_locallink/trimac_block/gmii_interface/gmii_rx_clk_bufio| 0.000|
------------+------------+------------+------------+------------+--------------------------------------------------------------+--------+