вышел хотфикс OrCAD/Allegro 17.2, HOTFIX VERSION: 008 Опции

[rom67]

Код

DATE: 10-29-2016   HOTFIX VERSION: 008
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CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
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1644406 ALLEGRO_EDITOR SHAPE            Alternate symbol placement results in illegal parent identifier error
1647098 SIP_LAYOUT     OTHER            SiP crashes on symbol copy and rotate
1647154 APD            OTHER            Disconnected Clines not working
1648817 GRE            IFP_INTERACTIVE  Allegro PCB Editor stops responding on adding netgroups to a nested netgroup
1649829 CONCEPT_HDL    CORE             Project Manager: A delay is observed before the sub menus of the File and Tools menus appear
1652930 ALLEGRO_EDITOR OTHER            Command-line version of switchversion not working
1653109 ASDA           DESIGN_CORRUPTIO SDA not pulling latest library information for part
1655377 FLOWS          PROJMGR          Project Manager crashes on Windows 10

[rom67]

вышел хотфикс OrCAD/Allegro 17.2, HOTFIX VERSION: 024

Код

Fixed CCRs: SPB 17.2 HF024
07-28-2017
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CCRID   Product            ProductLevel2 Title
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1762143 ADW                COMPONENT_BRO Part placed using the 'Add' button does not populate 'PART_NAME' property
1765790 ADW                PART_BROWSER  Fail to extract component part number and footprint information
1757719 ADW                TDA           TDO and Windchilll Work Group Manager out of sync at times
1760607 ALLEGRO_EDITOR     DATABASE      Value for number of decimal places changes in Pad Designer in release 17.2-2016
1775160 ALLEGRO_EDITOR     DFA           Loading DFA spreadsheet crashes PCB Editor in release 17.2-2016
1765984 ALLEGRO_EDITOR     OTHER         Cannot view System Info
1729350 ALLEGRO_EDITOR     REPORTS       Net loop is not listed in report
1725242 ALLEGRO_EDITOR     SHAPE         'Same net shape to hole spacing' is only detecting the DRC and not voiding the shape
1754402 ALLEGRO_EDITOR     SHAPE         Illegal arc radius error (SPMHA1-85)
1762888 ALLEGRO_EDITOR     SHAPE         Border line missing for some crosshatch (xhatch) shape voids
1769188 ALLEGRO_EDITOR     SHOW_ELEM     'Show Element' with the 'Groups' option used on certain modules crashes PCB Editor
1767690 ALLEGRO_EDITOR     TESTPREP      PCB Editor crashes when running automatic Testprep
1737337 ALLEGRO_EDITOR     UI_FORMS      Pinned Show Element window closes when opening new design in release 17.2-2016
1736642 ALLEGRO_PROD_TOOLB INTEGRATION   Cannot change accuracy to 4 for 'Change Width' in Productivity Toolbox
1685216 ALTM_TRANSLATOR    CAPTURE       Third-party translator placing symbols off grid
1738679 ALTM_TRANSLATOR    CAPTURE       Connectivity loss in imported schematic
1738705 ALTM_TRANSLATOR    CAPTURE       Connectivity loss in imported schematic
1748583 ALTM_TRANSLATOR    CAPTURE       Crash on importing design using third-party translator
1679310 ALTM_TRANSLATOR    PCB_EDITOR    Third-party translator should fix off-centered connections
1686845 ALTM_TRANSLATOR    PCB_EDITOR    Third-party translator does not place parts after successful translation
1723141 ALTM_TRANSLATOR    PCB_EDITOR    Placement outlines are rotated in third-party translator
1723164 ALTM_TRANSLATOR    PCB_EDITOR    Third-party translator creates board with missing data: vias, traces, and so on
1723190 ALTM_TRANSLATOR    PCB_EDITOR    Third-party translator changes design origin
1750496 ALTM_TRANSLATOR    PCB_EDITOR    Third-party board with arc tracks not correctly converted to arc clines
1769624 APD                DATABASE      Attempted symbol delete crashes APD
1727206 APD                SHAPE         Merging two shapes results in an incorrect shape
1707756 ASDA               VARIANT_MANAG Scrolling in Create Variant closes tool
1753699 CM                 RELEASE       installDebugger() does not work in release 17.2-2016 as SKILL kit is not installed
1741534 CONCEPT_HDL        CORE          DE-HDL freezes when selecting a net that contains many connections
1752687 CONCEPT_HDL        CORE          The move command changes the connectivity of the schematic
1763525 CONCEPT_HDL        CORE          Genview crashes when generating split symbols
1766797 CONCEPT_HDL        CORE          Schematic not refreshed after using the clear xnet overrides feature
1770852 F2B                PACKAGERXL    ERROR(SPCOPK-1138): A hard location was found on instances of different physical part types
1754473 FSP                DE-HDL_SCHEMA Provide an option to generate symbols with custom attributes
1748106 FSP                OTHER         Create protocol from existing protocol error message needs clarity
1724201 FSP                SYMBOL_EDITOR Unable to change 'Pin Direction' in symbol editor
1772429 ORBITIO            ALLEGRO_SIP_I Import - OrbitIO: Translator cannot create bundle in PCB Editor
1725759 SIG_INTEGRITY      OTHER         PCB shape/plane capacitance
1760924 SIP_LAYOUT         DIE_STACK_EDI Package height of die .dra file reset to 110um when placed
1764385 SIP_LAYOUT         MODULES       Embedded components are unplaced in created modules (.mdd)
1733679 SIP_LAYOUT         OTHER         'metal density scan' does not use select window
1763707 SIP_LAYOUT         OTHER         SiP Layout exits with error message in release 17.2-2016
1763515 SIP_RF             DIEEXPORT     Virtuoso writes incorrect width for 45 degree path segments in XDA file
1772397 TDA                DEHDL         DE-HDL crashes if license is not available for team design