вышел хотфикс OrCAD/Allegro 17.2, HOTFIX VERSION: 008 Опции

[rom67]

Код

DATE: 10-29-2016   HOTFIX VERSION: 008
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CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
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1644406 ALLEGRO_EDITOR SHAPE            Alternate symbol placement results in illegal parent identifier error
1647098 SIP_LAYOUT     OTHER            SiP crashes on symbol copy and rotate
1647154 APD            OTHER            Disconnected Clines not working
1648817 GRE            IFP_INTERACTIVE  Allegro PCB Editor stops responding on adding netgroups to a nested netgroup
1649829 CONCEPT_HDL    CORE             Project Manager: A delay is observed before the sub menus of the File and Tools menus appear
1652930 ALLEGRO_EDITOR OTHER            Command-line version of switchversion not working
1653109 ASDA           DESIGN_CORRUPTIO SDA not pulling latest library information for part
1655377 FLOWS          PROJMGR          Project Manager crashes on Windows 10

[rom67]

вышел хотфикс OrCAD/Allegro 17.2, HOTFIX VERSION: 039

Код

Fixed CCRs: SPB 17.2 HF039
05-11-2018
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CCRID   Product            ProductLevel2 Title
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1915149 ADV_PKG_ROUTER     OTHER         Auto-connect fails to initialize when rats are selected, but works with bundle
1870109 ADW                ADW_UPREV     Most mandatory properties turned into optional properties following database uprev
1758396 ADW                CONF          Server Memory setting in setting.ini is lost if server is re-configured using Conf
1911591 ADW                FLOW_MGR      Flow Manager does not start on high latency (> 25ms) networks: displays Java Content Disabled dialog
1887861 ADW                LIBIMPORT     Library Consolidation reports front2back issues but does not provide information about the issues.
1778977 ADW                REPORT_GENERA reportgen memory setting too high in release 17.2-2016 resulting in launch failure
1900422 ADW                REPORT_GENERA Save in reportgen does not save Preferred Part List entry into .rep file
1903888 ADW                REPORT_GENERA Report generator not outputting values as expected for PPL field
1916903 ADW                REPORT_GENERA Reportgen -gui is not producing the expected result
1902184 ALLEGRO_EDITOR     DATABASE      Add connect in package symbol crashes PCB Editor when using the 'clearance_view' variable
1914793 ALLEGRO_EDITOR     DATABASE      Updating shape crashes Allegro PCB Editor
1905138 ALLEGRO_EDITOR     DRC_CONSTR    Max Via count DRC disappears on running DRC update
1848015 ALLEGRO_EDITOR     MANUFACT      Export Creo View cannot find the webpage on the PTC site
1850553 ALLEGRO_EDITOR     MANUFACT      'File - Export - Creo View' is not working
1853960 ALLEGRO_EDITOR     MANUFACT      PTC Creo Interface link is broken
1862305 ALLEGRO_EDITOR     MANUFACT      PTC Creo interface link is not working
1878682 ALLEGRO_EDITOR     MULTI_USER    Delay in Symphony server session when server is started from Allegro PCB Editor
1890108 ALLEGRO_EDITOR     MULTI_USER    Database rejections in Symphony
1887331 ALLEGRO_EDITOR     NC            Milling (NC route) in Gerber tools is not the same as what it is in the board.
1898179 ALLEGRO_EDITOR     RAVEL_CHECKS  PCB High-Speed option required for high-speed rules when Venture license is selected
1461142 ALLEGRO_EDITOR     SHAPE         Pin with nearly-tangent via fails to generate void in dynamic shape, results in short.
1863467 ASDA               CROSSPROBE    Highlighting all parts in PCB Editor does not highlight all parts in SDA
1910974 ASDA               CROSSPROBE    Cross-probing between SDA and PCB Editor does not work
1904440 CONCEPT_HDL        CORE          SPCOCD-577 error on migrating from release 16.6 to release 17.2-2016
1909611 CONCEPT_HDL        CORE          DE-HDL stops responding on running '_movetogrid' and clicking 'No'
1808743 CONCEPT_HDL        PDF           Inconsistent display of Publish PDF hyperlinks
1894868 CONCEPT_HDL        PDF           XREFs getting clipped in the Published PDF
1911676 CONSTRAINT_MGR     CONCEPT_HDL   DE-HDL Constraint Manager crashes on selecting ECSet and then creating pin-pair option
1913968 CONSTRAINT_MGR     CONCEPT_HDL   Match Group pin-pairs are not created on applying ECSet to differential pair
1899638 CONSTRAINT_MGR     XNET_DIFFPAIR Differential pair buffer models are extracted differently in release 17.2-2016 and release 16.6
1914116 ORBITIO            ALLEGRO_SIP_I Unable to import OrbitIO file to SiP Layout
1896487 PCB_LIBRARIAN      GRAPHICAL_EDI Use lower-case characters for notes and pin text in New Symbol Editor
1898008 PCB_LIBRARIAN      SYMBOL_EDITOR Styling is not available for custom shape and pins.
1644787 PSPICE             FRONTENDPLUGI PSpice Model Search window does not show complete library path
1785939 PSPICE             FRONTENDPLUGI PSpice Part Search library browser should display path of the library directories
1855867 PSPICE             FRONTENDPLUGI PSpice Model Search window does not show complete library path
1887016 PSPICE             SIMULATOR     Pseudotran should always be invoked first time in case autoconvergence is ON
1895752 SIG_INTEGRITY      OTHER         Layout Cross Section: Wrong Differential Impedance calculation (0 ohms) in RHEL Linux 7.1 or later versions
1895759 SIG_INTEGRITY      OTHER         Cross Section does not calculate correct differential pair impedance in Linux CENTOS 7 and gives 0 value
1909257 SIP_LAYOUT         INTERACTIVE   Error 'E- (SPMHGE-639): Copying component with bond wire is not allowed' when copying SMD symbols
1900970 SIP_LAYOUT         SHAPE         Shape does not void around SMD Pins and Vias inside pad
1885496 SIP_LAYOUT         SYMB_EDIT_APP Pin Numbering: different results for release 16.6 and 17.2-2016 for the same case.
1907796 SIP_LAYOUT         SYMB_EDIT_APP SKILL commands fail to change pin number in SiP Layout
1887703 SIP_LAYOUT         WIREBOND      On trying to add wire bond to a die, SiP Layout crashes displaying a restart message
1903081 SPECCTRA           LICENSING     PCB Router is failing in Linux 7.1 in release 17.2-2016
1721606 SPECCTRA           ROUTE         PCB Router stops responding on exit if opened in the stand-alone mode
1844366 SPECCTRA           ROUTE         Allegro PCB Router will not exit
1873716 SPECCTRA           ROUTE         PCB Router does not close if opened from Allegro PCB Editor or in the stand-alone mode
1907703 SPIF               OTHER         PCB Editor crashes on choosing 'File - Export - Router' in release 17.2-2016
1889059 VSDP               DIEEXPORT     Incorrect pin location if bump cell origin is not at lower left for rotation other than R0