Цитата(-Al- @ Apr 26 2007, 23:47)
Применительно к PCI - бред
Вы не правы. Стандарт PCI 3.0 (и более ранние) говорит следующее:
Цитата
4.1.2. Dynamic vs. Static Drive Specification
The PCI bus has two electrical characteristics that motivate a different approach to
specifying I/O buffer characteristics. First, PCI is a CMOS bus, which means that steady
state currents (after switching transients have died out) are minimal. In fact, the majority of
the DC drive current is spent on pull-up resistors. Second, PCI is based on reflected wave
rather than incident wave signaling. This means that bus drivers are sized to only switch the
bus half way to the required high or low voltage. The electrical wave propagates down the
bus, reflects off the unterminated end and back to the point of origin, thereby doubling the
initial voltage excursion to achieve the required voltage level. The bus driver is actually in
the middle of its switching range during this propagation time, which lasts up to 10 ns, one
third of the bus cycle time at 33 MHz
Однако засечь с помощь осциллографа этот процесс мне не удалось. Хотя, если честно, то я особо и не старался - времени не было.
Уровни сигналов в PCI
Apr 26 2007, 10:49
