Cortex от Cypress Опции

[Axel]

В конце года Cypress обещает новые PSoCи с Cortex'ом. Параметры и набор периферии выглядят прилично:
-----------------------------------------------
Features
�� 32-bit ARM Cortex-M3 CPU Core
�� Flash program memory, up to 256 KB (100,000 write cycles)
�� Up to 64 KB SRAM memory
�� 2 KB EEPROM memory, 1 million cycles, 20 year retention
�� Low voltage, ultra low power
�� Wide operating voltage range: 1.7V to 5.5V
�� High efficiency boost from 0.5V
�� 500 μA at 1 MHz, 2 mA at 6 MHz
�� Four sleep modes including:
• 300 nA hibernate mode with RAM retention
• 2 μA sleep mode with real time clock, low voltage reset
interrupt, and watchdog timeout
�� Versatile IO system
�� 28 to 72 IO (62 GPIO, 8 SIO, 2 USBIO)
�� Any GPIO to any digital or analog peripheral routability
�� 1.2 to 5.5V interface voltages
�� Maskable, independent IRQ on any pin or port
�� Schmitt trigger TTL inputs
�� LCD direct drive up to 46x16 segments
�� All GPIO configurable as open drain high/low, pull up/down,
high Z, or strong output
�� Configurable GPIO pin state at power on reset (POR)
�� 25 mA sink on SIO
�� Digital peripherals
�� 16 to 24 programmable PLD-based Universal Digital Blocks
(UDB)
�� Full CAN 2.0b 16 RX, 8 TX buffers
�� Full-Speed (FS) USB 2.0 12 Mbps peripheral
�� Up to four 16-bit configurable timer/counter/PWM blocks
�� Library of standard peripherals
• 8, 16, 24, and 32-bit timers, counters, and PWMs
• SPI, UART, I2C™
• Many others available in catalog
�� Library of advanced peripherals
• Cyclic Redundancy Check (CRC)
• Pseudo Random Sequence (PRS) generator
• LIN Bus 2.0
• Quadrature decoder
�� Custom peripheral creation using Verilog
�� Analog peripherals
�� 0.2% internal voltage reference across -40°C to 85°C
�� Configurable Delta-Sigma ADC with 12 to 20-bit resolution
• Sample rates up to 192 ksps
• Programmable gain stage: x0.25 to x16
• 12-bit mode, 192 ksps, 70 dB SNR, 1.5 bit INL/DNL
• 16-bit mode, 48 ksps, 90 dB SNR, 1 bit INL/DNL
�� Two SAR ADCs, each 12-bit at 1 Msps
�� 80 MHz, 24-bit fixed point digital filter block (DFB) to
implement FIR and IIR filters
�� Up to four 8 MHz, 8-bit V/IDACs, configurable up to 12 bits
�� Four comparators with 30 ns response time
�� Four uncommitted opamps with 25 mA drive capability
�� Up to four switch capacitor blocks configurable to:
• Analog mixer
• Transimpedance amplifier
• Programmable gain amplifier x1 to x50
------------------------------------------------------------------
Даташит есть (preliminary). Выложить не могу , но желающим вышлю.

[proba]

значит будут делать,
http://www.msc-ge.com/frame/en/produkte/el...s/3389-www.html
как и многие другие , например тошиба.
http://www.toshiba-components.com/microcon...ler/Cortex.html
(15mw @ 40MHz - реально ли ? )