Frequency counter, на LPC2214 Опции

[Shedon]

Есть желание зделать на capture LPC2214 подсчёт импульсов, вопрос до какой максимальной частоты я смогу считать импульсы и с какой точностью ? Fosc = 10MHz(с кварцевого генератора "СОНАТА" класса А), pll будет множить на 6, т.е. частота cclk=60MHz.

[Shedon]

Вообще надо подсчитать сколько тактов на все деяния уходит, тогда точно предельную частоту узнаем.

Вот что по этому поводу в Technical Reference Manual пишут:

2.9 Interrupt latencies
The calculations for maximum and minimum latency are described in:
• Maximum interrupt latencies
• Minimum interrupt latencies.
2.9.1 Maximum interrupt latencies
When FIQs are enabled, the worst-case latency for FIQ comprises a combination of:
Tsyncmax The longest time the request can take to pass through the synchronizer.
Tsyncmax is four processor cycles.
Tldm The time for the longest instruction to complete. The longest instruction
is an LDM that loads all the registers including the PC. Tldm is 20 cycles
in a zero wait state system.
Texc The time for the Data Abort entry. Texc is three cycles.
Tfiq The time for FIQ entry. Tfiq is two cycles.
The total latency is therefore 29 processor cycles, just over 0.7 microseconds in a
system that uses a continuous 40MHz processor clock. At the end of this time, the
ARM7TDMI processor executes the instruction at 0x1c.
The maximum IRQ latency calculation is similar, but must allow for the fact that FIQ,
having higher priority, can delay entry into the IRQ handling routine for an arbitrary
length of time.
2.9.2 Minimum interrupt latencies
The minimum latency for FIQ or IRQ is the shortest time the request can take through
the synchronizer, Tsyncmin, plus Tfiq, a total of five processor cycles.