Не стартует Microblaze Опции

[serg-ant]

Добрый день!

Возникла необходимость в применении microblaze. Есть отладочная плата ML605 от Xilinx с Virtex 6 на борту.

Собрал проект, из-под ISE Project Navigator запустил XPS, создал с помощью визарда необходимую конфигурацию процессора. Сделал экспорт в SDK. Написал простенькую программку обмена сообщениями по I2C + моргание светодиодами.
Из-под SDK кнопкой Program FPGA загружаю прошивку в ПЛИС, жму Debug - всё прекрасно работает и стреляет.

Захотел имплементировать код elf файла в прошивку, чтобы при включении платы (ну или хотя бы просто при загрузке прошивки Virtex'a тем же самым Impact'ом) Microblaze начинал выполнять свою программу. И тут возникли проблемы. При загрузке прошивки в Virtex ничего не происходит, microblaze не стартует.

bit-файл для прошивки уже готовил двумя путями - 1. с помощью data2mem 2. подпихивал в XPS с последующей разводкой в ISE

Последующий дамп этих bit-файлов (с помощью data2mem) показал, что они одинаковы.

Шерстил форум, самое близкое, что нашёл - вот такую тему http://electronix.ru/forum/index.php?showtopic=89879

К сожалению, пока ничего сделать не получилось.

В файле линкера все блоки транслируются в BRAM, привожу кусок кода:

CODE

_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x400;
_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x400;

/* Define Memories in the system */

MEMORY
{
ilmb_cntlr_dlmb_cntlr : ORIGIN = 0x00000050, LENGTH = 0x0003FFB0
xps_bram_if_cntlr_0 : ORIGIN = 0x81438000, LENGTH = 0x00002000
}

/* Specify the default entry point to the program */

ENTRY(_start)

/* Define the sections, and where they are mapped in memory */

SECTIONS
{
.vectors.reset 0x00000000 : {
*(.vectors.reset)
}

.vectors.sw_exception 0x00000008 : {
*(.vectors.sw_exception)
}

.vectors.interrupt 0x00000010 : {
*(.vectors.interrupt)
}

.vectors.hw_exception 0x00000020 : {
*(.vectors.hw_exception)
}

Bmm файл вроде тоже в порядке (но точно не уверен). Беру тот, что создаёт сам ISE.

CODE

///////////////////////////////////////////////////////////////////////////////
//
// Processor 'microblaze_0', ID 100, memory map.
//
///////////////////////////////////////////////////////////////////////////////

ADDRESS_MAP microblaze_0 MICROBLAZE 100


///////////////////////////////////////////////////////////////////////////////
//
// Processor 'microblaze_0' address space 'lmb_bram_combined' 0x00000000:0x0003FFFF (256 KBytes).
//
///////////////////////////////////////////////////////////////////////////////

ADDRESS_SPACE lmb_bram_combined RAMB32 [0x00000000:0x0003FFFF]
BUS_BLOCK
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_0 [31:31] INPUT = lmb_bram_combined_0.mem PLACED = X1Y29;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_1 [30:30] INPUT = lmb_bram_combined_1.mem PLACED = X1Y27;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_2 [29:29] INPUT = lmb_bram_combined_2.mem PLACED = X0Y35;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_3 [28:28] INPUT = lmb_bram_combined_3.mem PLACED = X3Y33;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_4 [27:27] INPUT = lmb_bram_combined_4.mem PLACED = X2Y19;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_5 [26:26] INPUT = lmb_bram_combined_5.mem PLACED = X1Y18;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_6 [25:25] INPUT = lmb_bram_combined_6.mem PLACED = X3Y20;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_7 [24:24] INPUT = lmb_bram_combined_7.mem PLACED = X1Y21;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_8 [23:23] INPUT = lmb_bram_combined_8.mem PLACED = X1Y32;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_9 [22:22] INPUT = lmb_bram_combined_9.mem PLACED = X0Y33;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_10 [21:21] INPUT = lmb_bram_combined_10.mem PLACED = X3Y35;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_11 [20:20] INPUT = lmb_bram_combined_11.mem PLACED = X2Y35;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_12 [19:19] INPUT = lmb_bram_combined_12.mem PLACED = X1Y25;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_13 [18:18] INPUT = lmb_bram_combined_13.mem PLACED = X0Y25;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_14 [17:17] INPUT = lmb_bram_combined_14.mem PLACED = X2Y24;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_15 [16:16] INPUT = lmb_bram_combined_15.mem PLACED = X0Y21;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_16 [15:15] INPUT = lmb_bram_combined_16.mem PLACED = X0Y31;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_17 [14:14] INPUT = lmb_bram_combined_17.mem PLACED = X3Y31;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_18 [13:13] INPUT = lmb_bram_combined_18.mem PLACED = X1Y34;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_19 [12:12] INPUT = lmb_bram_combined_19.mem PLACED = X2Y33;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_20 [11:11] INPUT = lmb_bram_combined_20.mem PLACED = X2Y21;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_21 [10:10] INPUT = lmb_bram_combined_21.mem PLACED = X1Y23;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_22 [9:9] INPUT = lmb_bram_combined_22.mem PLACED = X3Y24;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_23 [8:8] INPUT = lmb_bram_combined_23.mem PLACED = X3Y22;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_24 [7:7] INPUT = lmb_bram_combined_24.mem PLACED = X3Y29;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_25 [6:6] INPUT = lmb_bram_combined_25.mem PLACED = X0Y29;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_26 [5:5] INPUT = lmb_bram_combined_26.mem PLACED = X2Y30;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_27 [4:4] INPUT = lmb_bram_combined_27.mem PLACED = X2Y28;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_28 [3:3] INPUT = lmb_bram_combined_28.mem PLACED = X0Y27;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_29 [2:2] INPUT = lmb_bram_combined_29.mem PLACED = X2Y26;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_30 [1:1] INPUT = lmb_bram_combined_30.mem PLACED = X0Y23;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_31 [0:0] INPUT = lmb_bram_combined_31.mem PLACED = X3Y27;
END_BUS_BLOCK;

BUS_BLOCK
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_32 [31:31] INPUT = lmb_bram_combined_32.mem PLACED = X1Y30;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_33 [30:30] INPUT = lmb_bram_combined_33.mem PLACED = X1Y28;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_34 [29:29] INPUT = lmb_bram_combined_34.mem PLACED = X0Y36;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_35 [28:28] INPUT = lmb_bram_combined_35.mem PLACED = X3Y34;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_36 [27:27] INPUT = lmb_bram_combined_36.mem PLACED = X2Y20;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_37 [26:26] INPUT = lmb_bram_combined_37.mem PLACED = X1Y19;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_38 [25:25] INPUT = lmb_bram_combined_38.mem PLACED = X3Y21;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_39 [24:24] INPUT = lmb_bram_combined_39.mem PLACED = X1Y22;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_40 [23:23] INPUT = lmb_bram_combined_40.mem PLACED = X1Y33;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_41 [22:22] INPUT = lmb_bram_combined_41.mem PLACED = X0Y34;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_42 [21:21] INPUT = lmb_bram_combined_42.mem PLACED = X3Y36;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_43 [20:20] INPUT = lmb_bram_combined_43.mem PLACED = X2Y36;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_44 [19:19] INPUT = lmb_bram_combined_44.mem PLACED = X1Y26;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_45 [18:18] INPUT = lmb_bram_combined_45.mem PLACED = X0Y26;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_46 [17:17] INPUT = lmb_bram_combined_46.mem PLACED = X2Y25;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_47 [16:16] INPUT = lmb_bram_combined_47.mem PLACED = X0Y22;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_48 [15:15] INPUT = lmb_bram_combined_48.mem PLACED = X0Y32;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_49 [14:14] INPUT = lmb_bram_combined_49.mem PLACED = X3Y32;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_50 [13:13] INPUT = lmb_bram_combined_50.mem PLACED = X1Y35;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_51 [12:12] INPUT = lmb_bram_combined_51.mem PLACED = X2Y34;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_52 [11:11] INPUT = lmb_bram_combined_52.mem PLACED = X2Y22;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_53 [10:10] INPUT = lmb_bram_combined_53.mem PLACED = X1Y24;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_54 [9:9] INPUT = lmb_bram_combined_54.mem PLACED = X3Y25;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_55 [8:8] INPUT = lmb_bram_combined_55.mem PLACED = X3Y23;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_56 [7:7] INPUT = lmb_bram_combined_56.mem PLACED = X3Y30;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_57 [6:6] INPUT = lmb_bram_combined_57.mem PLACED = X0Y30;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_58 [5:5] INPUT = lmb_bram_combined_58.mem PLACED = X2Y31;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_59 [4:4] INPUT = lmb_bram_combined_59.mem PLACED = X2Y29;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_60 [3:3] INPUT = lmb_bram_combined_60.mem PLACED = X0Y28;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_61 [2:2] INPUT = lmb_bram_combined_61.mem PLACED = X2Y27;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_62 [1:1] INPUT = lmb_bram_combined_62.mem PLACED = X0Y24;
Inst_mblaze/lmb_bram/lmb_bram/ramb36e1_63 [0:0] INPUT = lmb_bram_combined_63.mem PLACED = X3Y28;
END_BUS_BLOCK;
END_ADDRESS_SPACE;


///////////////////////////////////////////////////////////////////////////////
//
// Processor 'microblaze_0' address space 'xps_bram_if_cntlr_0_block_combined' 0x81438000:0x81439FFF (8 KBytes).
//
///////////////////////////////////////////////////////////////////////////////

ADDRESS_SPACE xps_bram_if_cntlr_0_block_combined RAMB32 [0x81438000:0x81439FFF]
BUS_BLOCK
Inst_mblaze/xps_bram_if_cntlr_0_block/xps_bram_if_cntlr_0_block/ramb36e1_0 [31:16] INPUT = xps_bram_if_cntlr_0_block_combined_0.mem PLACED = X2Y18;
Inst_mblaze/xps_bram_if_cntlr_0_block/xps_bram_if_cntlr_0_block/ramb36e1_1 [15:0] INPUT = xps_bram_if_cntlr_0_block_combined_1.mem PLACED = X3Y19;
END_BUS_BLOCK;
END_ADDRESS_SPACE;

END_ADDRESS_MAP;

В чём может быть проблема? Может не по тому адресу пишется программа? Или же кривой старт с ресет вектора? (вроде не менял, а вдруг надо).
Думаю, что решение довольно простое, но по форуму схожих проблем не нашёл (или просто плохо искал).
Заранее спасибо.