Mode_USR            EQU     0x10
Mode_FIQ            EQU     0x11
Mode_IRQ            EQU     0x12
Mode_SVC            EQU     0x13
Mode_ABT            EQU     0x17
Mode_UND               EQU     0x1B
Mode_SYS            EQU     0x1F

BASE_AIC            EQU        0xFFFFF000
AIC_EOICR_offset    EQU        0x130    
AIC_IVR_offset        EQU        0x100

I_Bit               EQU     0x80  


                EXTERN _IRQ_SYS

                EXPORT    IRQ_Entry
                                
                AREA    IRQIRQ, CODE, READONLY
                ARM
                            
IRQ_Entry

sub         LR, LR, #4;Корректировка значения
stmfd       SP!, {LR};Сохраняем LR_irq в стек IRQ.
mrs         R14, SPSR;Сохраняем SPSR
stmfd       SP!, {R14};в стек IRQ.
stmfd       SP!, {R0};Сохраняем R0 в стек IRQ.

ldr         R14, =BASE_AIC        ;Достаем адресс обработчика                    
ldr         R0 , [R14, #AIC_IVR_offset];прерывания    из IAC (AIC_IVR).
;str         r14, [r14, #AIC_IVR_offset]
    
mrs           R14, CPSR            ;
bic            R14, R14, #I_Bit    ;Разрешаем IRQ прерывания и
orr            R14, R14, #Mode_SVC    ;переходим Supervisor mod.
msr            CPSR_c, R14            ;

stmfd       SP!, { R1-R3, R12, R14};Сохраняем используемые регистры в IRQ-стеке

mov         LR, PC                ;точка возврата
bx          R0                    ;Вызываем обработчик


ldmia       SP!, {R1-R3, R12, R14};Востанавливаем регистры

mrs            R0, CPSR            ;
bic            R0, R0, #Mode_SYS    ;
orr            R0, R0, #I_Bit :OR: Mode_IRQ;Заприщаем IRQ прерывания и
msr            CPSR_c, R0            ;переходим в IRQ mode.

ldr         R14, =BASE_AIC        ;Отмечаем окончания
str         R14, [R14, #AIC_EOICR_offset];прерывания

ldmia       SP!, {R0}            ;Востанавливаем R0
ldmia       SP!, {R14}            ;
msr         SPSR_cxsf, R14        ;и SPSR
ldmia       SP!, {PC}^            ;

                END

FIQ_Handler_Entry:

;- Switch in SVC/User Mode to allow User Stack access for C code
; because the FIQ is not yet acknowledged

;- Save and r0 in FIQ_Register
            mov         r9,r0
            ldr         r0 , [r8, #AIC_FVR]
            msr         CPSR_c,#I_BIT | F_BIT | ARM_MODE_SVC

;- Save scratch/used registers and LR in User Stack
            stmfd       sp!, { r1-r3, r12, lr}

;- Branch to the routine pointed by the AIC_FVR
            mov         r14, pc
            bx          r0

;- Restore scratch/used registers and LR from User Stack
            ldmia       sp!, { r1-r3, r12, lr}

;- Leave Interrupts disabled and switch back in FIQ mode
            msr         CPSR_c, #I_BIT | F_BIT | ARM_MODE_FIQ

;- Restore the R0 ARM_MODE_SVC register
            mov         r0,r9

;- Restore the Program Counter using the LR_fiq directly in the PC
            subs        pc,lr,#4

                   END

        ldr        pc, [pc, #-0xf20]