Цитата
stm32f0 вроде не Cortex-M0+. Так что NVIC_SetVectorTable не годится.
Цитата
To build such application, some special configuration has to be performed:
1. Set the application load address at 0x08003000, using your toolchain linker file
2. To be able to serve the application interrupts, you need to relocate the vector
table (which contains the interrupt handlers). However, unlike CortexM3 and CortexM4,
the CortexM0 processor do not support vector table relocation (it is fixed at
address 0x00000000).
A solution will be to relocate by software the vector table to the internal SRAM:
- Copy the vector table from the Flash (mapped at the base of the application load
address 0x08003000) to the base address of the SRAM at 0x20000000.
- Remap SRAM at address 0x00000000, using SYSCFG_MemoryRemapConfig() function
- Then once an interrupt occurs, the CortexM0 processor will fetch the interrupt
handler start address from the relocated vector table in SRAM, then it will
jump to execute the interrupt handler located in the Flash.
This operation should be done at the initialization phase of the application.
Разобрался с этим вопросом. На сайте ST нашел вот такой архив "stm32f0_programming_usart.zip". Там все очень хорошо описано.
Всем спасибо!