#include <stdio.h>
#include "msp430x14x.h"
#include <intrinsics.h>

#include "main.h"

//extern void writeuc_SPI(unsigned char data);
#define iSCO 0x40
#define iSCK 0x20
void main()
{
  init();
  Usets();
  __enable_interrupt();
  for(;;)
  {
    
    P3OUT |= iSCO; // P3.6 MOSI
    P4OUT |= iSCK; // P4.5 MSCK
    //Ureg = 0x55;
    //writeuc_SPI(Ureg);
    //Uucwr(readuc_SPI());
    //Uucwr(0x55);
  
  }
}

#include <stdio.h>
//#include <msp430f149.h>
#include <msp430x14x.h>
#include <intrinsics.h>

#include "main.h"

//extern void writeuc_SPI(unsigned char data);

void main(void)
{
  //init();
  WDTCTL = WDTPW + WDTHOLD;  
   P3DIR |= 0x40; // P3.6 MOSI
    P4DIR |= 0x20; // P4.5 MSCK
    P3OUT |= 0x40; // P3.6 MOSI
    P4OUT |= 0x20; // P4.5 MSCK
    //P3OUT &= ~iSCO; // P3.6 MOSI
    //P4OUT &= ~iSCK; // P4.5 MSCK
  //Usets();
  __enable_interrupt();
  for(;;)
  {
    
  
    
    //P3OUT &= ~iSCO; // P3.6 MOSI
    //P4OUT &= ~iSCK; // P4.5 MSCK
    
    //Ureg = 0x55;
    //writeuc_SPI(Ureg);
    //Uucwr(readuc_SPI());
    //Uucwr(0x55);
  
  }
}

#include <msp430x14x.h>

void main(void)
{
    WDTCTL = WDTPW + WDTHOLD;

    P3DIR |= 0x40; // P3.6
    P4DIR |= 0x20; // P4.5
    P3OUT |= 0x40; // P3.6
    P4OUT |= 0x20; // P4.5
    for(;;);
}

#include <stdio.h>
//#include <msp430f149.h>
#include <msp430x14x.h>
#include <intrinsics.h>

#include "main.h"

//extern void writeuc_SPI(unsigned char data);

void main(void)
{
  //init();
  WDTCTL = WDTPW + WDTHOLD;  
    P3SEL &=~0x40;
    P4SEL &= ~0x20;
    P3DIR |= 0x40; // P3.6 MOSI
    P4DIR |= 0x20; // P4.5 MSCK
    P3OUT |= 0x40; // P3.6 MOSI
    P4OUT |= 0x20; // P4.5 MSCK
    //P3OUT &= ~iSCO; // P3.6 MOSI
    //P4OUT &= ~iSCK; // P4.5 MSCK
  //Usets();
  __enable_interrupt();
  for(;;)
  {
    
  
    
    //P3OUT &= ~iSCO; // P3.6 MOSI
    //P4OUT &= ~iSCK; // P4.5 MSCK
    
    //Ureg = 0x55;
    //writeuc_SPI(Ureg);
    //Uucwr(readuc_SPI());
    //Uucwr(0x55);
  
  }
}

                ****************************************
                *                                      *
                *            MODULE SUMMARY            *
                *                                      *
                ****************************************

Module               CODE      DATA
------               ----      ----
                    (Rel)  (Rel)  (Abs)
?__exit                 2
?_exit                  4
?cstart                12
?exit                   4
?reset_vector           2
main                   44             8
N/A (command line)            80
------                 --     --      -
Total:                 68     80      8


                ****************************************
                *                                      *
                *              CALL GRAPH              *
                *                                      *
                ****************************************

  ->Sub-tree of type: Function tree
                             CSTACK
    | Stack used (prev) :  00000000
  01  main
      | Stack used (prev) :  00000000
      | + function block  :  00000002
  <-Sub-tree of type: Function tree
    | Stack used          :  00000002


  ->Sub-tree of type: Function tree
                             CSTACK
    | Stack used (prev) :  00000002
  01  exit
      | Stack used (prev) :  00000002
      | + function block  :  00000002
  <-Sub-tree of type: Function tree
    | Stack used          :  00000004




                ****************************************
                *                                      *
                *      SEGMENTS IN ADDRESS ORDER       *
                *                                      *
                ****************************************


SEGMENT              SPACE    START ADDRESS   END ADDRESS     SIZE  TYPE  ALIGN
=======              =====    =============   ===========     ====  ====  =====
DATA16_AN                              0019 - 001B               3   rel    0
                                       001D - 001F               3
                                       0120 - 0121               2
CSTACK                                 09B0 - 09FF              50   rel    1
CSTART                                 1100 - 110B               C   rel    1
<CODE> 1                               110C - 1141              36   rel    1
RESET                                  FFFE - FFFF               2   rel    1

                ****************************************
                *                                      *
                *        END OF CROSS REFERENCE        *
                *                                      *
                ****************************************

68 bytes of CODE memory
80 bytes of DATA memory (+ 8 absolute )

Errors: none
Warnings: none

настройка клоков:
  BCSCTL1 = 0x49; // Максимальная частота, делитель отсутствует
  BCSCTL2 = 0;
  WDTCTL = WDTPW + WDTHOLD;  
  DCOCTL = DCO0 + DCO1 + DCO2; // Модулятор запрещен, максимальная частота

  

настройка ЮАРТа:
void Usets()
{
  P3SEL = 0x10|0x20;
  //PSEL &= ~0x20;
  UCTL0 = 0x01|0x10; // 8 bit data
  UTCTL0 = 0x04|0x20; // tx wake-up enable, system clock for baud-rate
  URCTL0 = 0x04; // rx wake-up enable
  UBR00 = 0x01; // 9600
  //UBR10 = 0x33;
  UMCTL0 = 0x4A;
  ME1 = UTXE0;
  
  UCTL0 &= ~0x01;
  U0IE = 0x10; // interrupt enable  
}

DCOCTL=DCO0|DCO1|DCO2;                  //DCO около 5МГц
BCSCTL1 = (RSEL0 | RSEL1 | RSEL2);
BCSCTL2 = (DIVS)|(DIVM_0)|(SELM_0)|(SELS);    // SMCLK=XT2CLK, DIVS=1, DIVM=1, MCLK=DCOCLC

  WDTCTL = WDTPW + WDTHOLD;
  
  
  DCOCTL=DCO0|DCO1|DCO2; //DCO = 7, MOD = 0
  BCSCTL1 = (RSEL0 | RSEL1 | RSEL2 | XTS | XT2OFF); // RSEL = 7, The high-freq oscillator, XT2 not used
  BCSCTL2 = (DIVS_0 )|(DIVM_0)|(SELM_0);    // SMCLK (DIVS.1 .. DIVS.0)=0, DIVS=1, DIVM=1, SELS = 0: DCOCLK, MCLK = DCOCLK  


ЮАРТ:
  P3SEL = BIT4 | BIT5; // UART pins enable
  
  UCTL0 = SWRST|CHAR; //  software reset,8 bit data
  UTCTL0 = TXWAKE|SSEL1; // SMCLOK, TXWAKE
  UBR00 = 0x6D; // 9600
  UMCTL0 = 0x03;
  ME1 = UTXE0; // UART0 enable
  UCTL0 &= ~SWRST;
  U0IE = 0x10; // interrupt enable

void bit_set()
{
  TACTL = TASSEL1;
  TACCTL0 = 0;
  TACCR0 = 1;
  TAR = 0;
}
void bit_time()
{
  TACTL |= MC0; //  Timer A mode control 0,  Up to CCR0, start timer
  while(!(TACCTL0&CCIFG));
  TACCTL0&=~CCIFG;
  TACTL &= ~MC0;
  TAR = 0;
}