CODE
void SystemInit (void)
{
uint32_t org;
unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
extern void *__Vectors;
#if defined(CORE_M4) && defined(USE_FPU)
fpuEnable();
#endif
#if !defined(CORE_M0)
// Set up Cortex_M3 or M4 VTOR register to point to vector table
// This code uses a toolchain defined symbol to locate the vector table
// If this is not completed, interrupts are likely to cause an exception.
// unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
#if defined(__IAR_SYSTEMS_ICC__)
extern void *__vector_table;
org = *pSCB_VTOR = (unsigned int)&__vector_table;
#elif defined(__CODE_RED)
extern void *g_pfnVectors;
org = *pSCB_VTOR = (unsigned int)g_pfnVectors;
#elif defined(__ARMCC_VERSION)
// extern void *__Vectors;
org = *pSCB_VTOR = (unsigned int)&__Vectors;
#else
// в файле startup таблица описана так
/* Vector Table */
.section ".cs3.interrupt_vector"
.globl __cs3_interrupt_vector_cortex_m
.type __cs3_interrupt_vector_cortex_m, %object
org = *pSCB_VTOR = (unsigned int)&__cs3_interrupt_vector_cortex_m
//#error Unknown compiler
#endif
#else
// Cortex M0?
#error Cannot configure VTOR on Cortex_M0
#endif
// LPC18xx/LPC43xx ROM sets the PLL to run from IRC and drive the part
// at 96 MHz out of reset
SystemCoreClock = 96000000;
// In case we are running from external flash, (booted by boot rom)
// We enable the EMC buffer to improve performance.
if(org == 0x1C000000)
{
/*Enable Buffer for External Flash*/
LPC_EMC->STATICCONFIG0 |= 1<<19;
}
// In case we are running from internal flash, we configure the flash
// accelerator. This is a conservative value that should work up to 204
// MHz on the LPC43xx or 180 MHz on the LPC18xx. This value may change
// as the chips are characterized and should also change based on
// core clock speed.
#define FLASH_ACCELERATOR_SPEED 6
#ifdef INTERNAL_FLASH
{
uint32_t *MAM,t;
// Set up flash controller for both banks
// Bank A
MAM = (uint32_t *)(LPC_CREG_BASE + 0x120);
t=*MAM;
t &= ~(0xF<<12);
*MAM = t | (FLASH_ACCELERATOR_SPEED<<12);
// Bank B
MAM = (uint32_t *)(LPC_CREG_BASE + 0x124);
t=*MAM;
t &= ~(0xF<<12);
*MAM = t | (FLASH_ACCELERATOR_SPEED<<12);
}
#endif
}
{
uint32_t org;
unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
extern void *__Vectors;
#if defined(CORE_M4) && defined(USE_FPU)
fpuEnable();
#endif
#if !defined(CORE_M0)
// Set up Cortex_M3 or M4 VTOR register to point to vector table
// This code uses a toolchain defined symbol to locate the vector table
// If this is not completed, interrupts are likely to cause an exception.
// unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
#if defined(__IAR_SYSTEMS_ICC__)
extern void *__vector_table;
org = *pSCB_VTOR = (unsigned int)&__vector_table;
#elif defined(__CODE_RED)
extern void *g_pfnVectors;
org = *pSCB_VTOR = (unsigned int)g_pfnVectors;
#elif defined(__ARMCC_VERSION)
// extern void *__Vectors;
org = *pSCB_VTOR = (unsigned int)&__Vectors;
#else
// в файле startup таблица описана так
/* Vector Table */
.section ".cs3.interrupt_vector"
.globl __cs3_interrupt_vector_cortex_m
.type __cs3_interrupt_vector_cortex_m, %object
org = *pSCB_VTOR = (unsigned int)&__cs3_interrupt_vector_cortex_m
//#error Unknown compiler
#endif
#else
// Cortex M0?
#error Cannot configure VTOR on Cortex_M0
#endif
// LPC18xx/LPC43xx ROM sets the PLL to run from IRC and drive the part
// at 96 MHz out of reset
SystemCoreClock = 96000000;
// In case we are running from external flash, (booted by boot rom)
// We enable the EMC buffer to improve performance.
if(org == 0x1C000000)
{
/*Enable Buffer for External Flash*/
LPC_EMC->STATICCONFIG0 |= 1<<19;
}
// In case we are running from internal flash, we configure the flash
// accelerator. This is a conservative value that should work up to 204
// MHz on the LPC43xx or 180 MHz on the LPC18xx. This value may change
// as the chips are characterized and should also change based on
// core clock speed.
#define FLASH_ACCELERATOR_SPEED 6
#ifdef INTERNAL_FLASH
{
uint32_t *MAM,t;
// Set up flash controller for both banks
// Bank A
MAM = (uint32_t *)(LPC_CREG_BASE + 0x120);
t=*MAM;
t &= ~(0xF<<12);
*MAM = t | (FLASH_ACCELERATOR_SPEED<<12);
// Bank B
MAM = (uint32_t *)(LPC_CREG_BASE + 0x124);
t=*MAM;
t &= ~(0xF<<12);
*MAM = t | (FLASH_ACCELERATOR_SPEED<<12);
}
#endif
}