Столкнулся с проблемой. Не получается запретить прерывание
в обработчике. Контроллер STM32F103RC.
Ниже пример моего кода. До запрещения прерывания
ожидается, что оно произойдет 3 раза.
CODE
**---------------------------------------------------------------------------
* @brief IRQHandler for analog watchdog ADC1_2
* @param none
* @retval none
*---------------------------------------------------------------------------
*/
void ADC1_2_IRQHandler (void)
{
static uint8_t cnt = 0;
/* Analog watchdog flag? */
if (BIT_BAND_PER(ADC1->SR, ADC_SR_AWD)) {
/* Clears interrupt pending ADC_IT_AWD */
BIT_BAND_PER(ADC1->SR, ADC_SR_AWD) = 0;
if (cnt++ < 3) return;
cnt = 0;
/* Capture TIM8 value */
TIM8->EGR = TIM_EventSource_CC1;
/* Comparator timestamp for current cycle */
digreg_state.comp_timest.block_num[CycleParam.cycle_number] = control_wrseq.block_num;
digreg_state.comp_timest.counter[CycleParam.cycle_number] = (cnt_20Hz << 16) | TIM8->CCR1;
flag_event.CompOverdraft = 1;
/* Disable watchdog ADC1_2*/
ADC1->CR1 &= (~(uint32_t)ADC_IT_AWD);
}
}
* @brief IRQHandler for analog watchdog ADC1_2
* @param none
* @retval none
*---------------------------------------------------------------------------
*/
void ADC1_2_IRQHandler (void)
{
static uint8_t cnt = 0;
/* Analog watchdog flag? */
if (BIT_BAND_PER(ADC1->SR, ADC_SR_AWD)) {
/* Clears interrupt pending ADC_IT_AWD */
BIT_BAND_PER(ADC1->SR, ADC_SR_AWD) = 0;
if (cnt++ < 3) return;
cnt = 0;
/* Capture TIM8 value */
TIM8->EGR = TIM_EventSource_CC1;
/* Comparator timestamp for current cycle */
digreg_state.comp_timest.block_num[CycleParam.cycle_number] = control_wrseq.block_num;
digreg_state.comp_timest.counter[CycleParam.cycle_number] = (cnt_20Hz << 16) | TIM8->CCR1;
flag_event.CompOverdraft = 1;
/* Disable watchdog ADC1_2*/
ADC1->CR1 &= (~(uint32_t)ADC_IT_AWD);
}
}