#include "stm32f4xx.h"
uint32_t LED_STATE = 0xF000;
uint32_t res;
int main()
{
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN|RCC_AHB1ENR_GPIODEN;
RCC->APB2ENR |= RCC_APB2ENR_ADC1EN;
//GPIOA->MODER |= 0x0000000C;
GPIOD->MODER |= 0x55000000;
GPIOD->OTYPER |= 0;
GPIOD->OSPEEDR |= 0;
ADC1->SMPR2 |= (ADC_SMPR2_SMP1_2 | ADC_SMPR2_SMP1_1 | ADC_SMPR2_SMP1_0); //Задаем время выборки
ADC1->CR2 |= ADC_CR2_JEXTSEL; //Преобразование инжектированной группы
ADC1->CR2 |= ADC_CR2_JEXTEN; //Разрешаем внешний запуск инжектированной группы
ADC1->CR2 |= ADC_CR2_CONT; //Преобразования запускаются одно за другим
ADC1->CR1 |= ADC_CR1_JAUTO;
ADC1->JSQR |= (1<<15); //Задаем номер канала - ADC1
ADC1->CR2 |= ADC_CR2_ADON;//Теперь включаем АЦП
ADC1->CR2 |= ADC_CR2_JSWSTART; //Запуск преобразований
while (!(ADC1->SR & ADC_SR_JEOC)); //ждем пока первое преобразование завершится
while(1)
{

res = ADC1->JDR1;
if (res > 1024)
{
GPIOD->ODR=LED_STATE;
}
}
}

#include "stm32f4xx.h"
uint32_t LED_STATE = 0xF000;
int main()
{
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN|RCC_AHB1ENR_GPIODEN;
RCC->APB2ENR |= RCC_APB2ENR_ADC1EN;
GPIOA->MODER |= 0x0000000C;
GPIOD->MODER |= 0x55000000;
GPIOD->OTYPER |= 0;
GPIOD->OSPEEDR |= 0;

ADC1->SMPR2 |= (ADC_SMPR2_SMP1_2 | ADC_SMPR2_SMP1_1 | ADC_SMPR2_SMP1_0);
ADC1->CR2 |= ADC_CR2_EXTSEL;
ADC1->CR2 |= ADC_CR2_EXTEN;
ADC1->CR2 |= ADC_CR2_CONT;
ADC1->SQR1 |= (1<<15); //Задаем номер канала - ADC1
ADC1->CR2 |= ADC_CR2_ADON;//Теперь включаем АЦП
ADC1->CR2 |= ADC_CR2_SWSTART; //Запуск преобразований
while (!(ADC1->SR & ADC_SR_EOC)); //ждем пока первое преобразование завершится
uint32_t res;
while(1)
{
res = ADC1->DR;
if (res > 1024)
{
GPIOD->ODR=LED_STATE;
}
}
}

ADC1->CR2 |= ADC_CR2_CONT; //Преобразования запускаются одно за другим
    ADC1->CR1 |= ADC_CR1_AUTO | ADC_CR1_SCAN; //Разрешить автопреобразование инжектированной группы и SCAN означает брать номера каналов для сканирования из JSQR.
    ADC1->JSQR |= (ADC_SQR_SQ4_0 ); //Задаем номер канала (выбран ADC1)
    ADC1->CR2 |= ADC_CR2_ADON;//Теперь включаем АЦП

Здесь получаем данные:
ADC1->CR2 |= ADC_CR2_SWSTART;
while (!(ADC1->SR & ADC_SR_EOC));
ADC1->SR =0; // Очищаем флаг «преобразование завершено»
res = ADC1->DR;

#include "stm32f4xx.h"
uint32_t LED_STATE = 0xF000;
uint32_t res;
int main()
{
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN|RCC_AHB1ENR_GPIODEN;
RCC->APB2ENR |= RCC_APB2ENR_ADC1EN|RCC_APB2ENR_SYSCFGEN;
GPIOA->MODER |= 0x0000000C;
GPIOD->MODER |= 0x55000000;
GPIOD->OTYPER |= 0;
GPIOD->OSPEEDR |= 0;
ADC1->SMPR2 |= (ADC_SMPR2_SMP1_2 | ADC_SMPR2_SMP1_1 | ADC_SMPR2_SMP1_0); //Задаем время выборки
ADC1->CR2 |= ADC_CR2_JEXTSEL; //Преобразование инжектированной группы
ADC1->CR2 |= ADC_CR2_JEXTEN; //Разрешаем внешний запуск инжектированной группы
ADC1->CR2 |= ADC_CR2_CONT; //Преобразования запускаются одно за другим
ADC1->CR1 |= ADC_CR1_JAUTO;
//ADC1->CR1 |= 0x00000020;
ADC1->JSQR |= ADC_JSQR_JSQ4_0; //Задаем номер канала - ADC1
ADC1->CR2 |= ADC_CR2_ADON;//Теперь включаем АЦП
while(1)
{
ADC1->CR2 |= ADC_CR2_JSWSTART; //Запуск преобразований
while (!(ADC1->SR & ADC_SR_JEOC)); //ждем пока первое преобразование завершится
ADC1->SR = 0;
res = ADC1->JDR1;
if (res > 1024)
{
GPIOD->ODR = LED_STATE;
}
else
{
GPIOD->ODR ^= LED_STATE;
}
}
}

GPIOD->ODR ^= LED_STATE;

#include "stm32f4xx.h"
uint32_t LED_STATE = 0xF000;
uint32_t res;
int main()
{
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN|RCC_AHB1ENR_GPIODEN;
RCC->APB2ENR |= RCC_APB2ENR_ADC1EN|RCC_APB2ENR_SYSCFGEN;
GPIOA->MODER |= 0x0000000C;
GPIOD->MODER |= 0x55000000;
GPIOD->OTYPER |= 0;
GPIOD->OSPEEDR |= 0;
ADC1->SMPR2 |= (ADC_SMPR2_SMP1_2 | ADC_SMPR2_SMP1_1 | ADC_SMPR2_SMP1_0); //Задаем время выборки
ADC1->CR2 |= ADC_CR2_EXTSEL; //Преобразование инжектированной группы
ADC1->CR2 |= ADC_CR2_EXTEN; //Разрешаем внешний запуск инжектированной группы
ADC1->CR2 |= ADC_CR2_CONT; //Преобразования запускаются одно за другим
ADC1->SQR3 |= ADC_SQR3_SQ1_0; //Задаем номер канала - ADC1
ADC1->CR2 |= ADC_CR2_ADON;//Теперь включаем АЦП
while(1)
{
ADC1->CR2 |= ADC_CR2_SWSTART; //Запуск преобразований
while (!(ADC1->SR & ADC_SR_EOC)); //ждем пока первое преобразование завершится
ADC1->SR = 0;
res = ADC1->DR;
if (res > 1024)
{
GPIOD->ODR = LED_STATE;
}
else
{
GPIOD->BSRRH |= (1 << 15)|(1 << 14)|(1 << 13)|(1 << 12);
}
}
}

RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);

// ноги PA0 и PA1 по умолчанию настроены на вход

ADC_StructInit(&ADC_InitStructure);
ADC_InitStructure.ADC_Mode = ADC_Mode_RegSimult; //Режим Регулярный Одновременный
ADC_InitStructure.ADC_ScanConvMode = ENABLE; // режим сканирования
ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; // многократное измерение
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None; // без внешнего триггера
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; //выравнивание битов результат - прижать вправо
ADC_InitStructure.ADC_NbrOfChannel = 2; //количество каналов
ADC_Init(ADC1, &ADC_InitStructure);
ADC_ITConfig(ADC1, ADC_IT_EOC, ENABLE); // прерывание от окончании преобразования

ADC_Cmd(ADC1, ENABLE); // включение ADC
// настройка канала
ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_55Cycles5);
ADC_RegularChannelConfig(ADC1, ADC_Channel_1, 2, ADC_SampleTime_55Cycles5);

// калибровка АЦП
ADC_ResetCalibration(ADC1);
while (ADC_GetResetCalibrationStatus(ADC1));
ADC_StartCalibration(ADC1);
while (ADC_GetCalibrationStatus(ADC1));



/* NVIC configuration */
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
NVIC_InitStructure.NVIC_IRQChannel = ADC1_2_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);

ADC_SoftwareStartConvCmd(ADC1, ENABLE);

void ADC1_2_IRQHandler (void)
{
    ADC_ClearITPendingBit(ADC1, ADC_IT_EOC);
    switch(cnt_number_channel_ADC1++)
    {
    case 0: ADC1_IN0_Value = ADC1->DR;
            break;
    case 1: cnt_number_channel_ADC1 = 0;
            ADC1_IN1_Value = ADC1->DR;
            break;
    default: break;
    }
              // передаем
    FlagADC1 = 1;
}

void InitADC(void)
{
ADC_InitTypeDef ADC_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
DMA_InitTypeDef DMA_InitStructure;

RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_2;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN;
GPIO_Init(GPIOC, &GPIO_InitStructure);

/* DMA1 channel1 configuration ----------------------------------------------*/
//DMA_DeInit(DMA1_Channel1);
//DMA_InitStructure.DMA_PeripheralBaseAddr = ADC1->DR;
DMA_InitStructure.DMA_PeripheralBaseAddr = ADC1_DR_Address;
#warning check it
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)adc_buf;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
DMA_InitStructure.DMA_BufferSize = ADC_BUF_SIZE;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(DMA1_Channel1, &DMA_InitStructure);
DMA_ClearITPendingBit(DMA1_IT_HT1);
DMA_ClearITPendingBit(DMA1_IT_TC1);

DMA_ITConfig(DMA1_Channel1, (DMA_IT_TC | DMA_IT_HT), ENABLE);
//DMA_ITConfig(DMA1_Channel1, DMA1_IT_TC1, ENABLE);
/* Enable DMA1 channel1 */
DMA_Cmd(DMA1_Channel1, ENABLE);

NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel1_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
NVIC_EnableIRQ(DMA1_Channel1_IRQn);

/* ADC1 configuration ------------------------------------------------------*/
ADC_InitStructure.ADC_Mode = ADC_Mode_Independent;
ADC_InitStructure.ADC_ScanConvMode = ENABLE;
ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T3_TRGO;
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NbrOfChannel = 2;
ADC_Init(ADC1, &ADC_InitStructure);

/* ADC1 regular channel Configuration */
ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_239Cycles5);
ADC_RegularChannelConfig(ADC1, ADC_Channel_11, 2, ADC_SampleTime_239Cycles5);

ADC_ExternalTrigConvCmd(ADC1, ENABLE);

/* Enable ADC1 DMA */
ADC_DMACmd(ADC1, ENABLE);

/* Enable ADC1 */
ADC_Cmd(ADC1, ENABLE);

/* Enable ADC1 reset calibaration register */
ADC_ResetCalibration(ADC1);
/* Check the end of ADC1 reset calibration register */
while (ADC_GetResetCalibrationStatus(ADC1));

/* Start ADC1 calibaration */
ADC_StartCalibration(ADC1);
/* Check the end of ADC1 calibration */
while (ADC_GetCalibrationStatus(ADC1));

}


void InitTimer3(void)
{
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;

/* TIM3 clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);

/* Time base configuration */
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.TIM_Period = 23999; /// 1 khz clock required nned to check core frequency
TIM_TimeBaseStructure.TIM_Prescaler = 2;
TIM_TimeBaseStructure.TIM_ClockDivision = 0x0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure);

/* TIM3 TRGO selection */
TIM_SelectOutputTrigger(TIM3, TIM_TRGOSource_Update);

/* TIM3 enable counter */
TIM_Cmd(TIM3, ENABLE);
}


void DMA1_Channel1_IRQHandler(void)
{
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;

if (DMA_GetITStatus(DMA1_IT_HT1))
{
DMA_ClearITPendingBit(DMA1_IT_HT1);
xSemaphoreGiveFromISR(xSemaphoreADC_DMA_HT, &xHigherPriorityTaskWoken );
}
if (DMA_GetITStatus(DMA1_IT_TC1))
{
DMA_ClearITPendingBit(DMA1_IT_TC1);
xSemaphoreGiveFromISR(xSemaphoreADC_DMA_TC, &xHigherPriorityTaskWoken );
}
DMA_ClearITPendingBit(DMA1_IT_GL1);
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
}

    RCC->APB2ENR |=(1<<8);                                                        //
    ADC1->CR2 |= (1<<0);                                                            //ADON: A/D Converter ON    
    ADC->CCR |= (1<<16)|(1<<17);             //TSVREFE: Temperature sensor and VREFINT enable & VBATE: VBAT enable
    ADC1->CR2 |= ADC_CR2_DDS;                                                             //DMA: Direct memory access mode (for single ADC mode)
    ADC1->CR2 |= ADC_CR2_DMA;                                                             //DMA disable selection (for single ADC mode)
    ADC1->CR2 |= (1<<1);                                                            //CONT: Continuous conversion
    ADC1->SMPR2 |= (1<<12);         //IN4 = 111: 480 cycles
    ADC1->SQR1 &= ~((1<<20)|(1<<21)|(1<<22)|(1<<23));            //11: 1 conversions
    ADC1->SQR3 = 4;                                                                        //
    
    RCC->AHB1ENR |=(1<<22);                                                      //DMA1EN: DMA2 clock enable
    DMA2_Stream0->CR &= ~((1<<27)|(1<<26)|(1<<25));      //000: channel 0 selected
    DMA2_Stream0->CR |= (1<<13);                                        //MSIZE[1:0]: Memory data size 01: half-word (16-bit)
    DMA2_Stream0->CR |= (1<<11);                                          //PSIZE[1:0]: Peripheral data size 01: Half-word (16-bit)
    DMA2_Stream0->CR |= (1<<10);                                          //MINC: Memory increment mode
    DMA2_Stream0->CR |= DMA_SxCR_PL;
    DMA2_Stream0->CR &= ~((1<<7)|(1<<6));                       //DIR[1:0]: Data transfer direction 00: Peripheral-to-memory
    DMA2_Stream0->NDTR = sample_size_adc;                                              //NDT[15:0]: Number of data items to transfer
    DMA2_Stream0->PAR = (uint32_t)&ADC1->DR;                  //PAR[31:0]: Peripheral address
    DMA2_Stream0->M0AR = (uint32_t)&My_mass;              //M0A[31:0]: Memory 0 address
    DMA2_Stream0->CR |= (1<<0);                                              //EN: Stream enable / flag stream ready when read low
    ADC1->CR2 |= (1<<30);                                                          //SWSTART: Start conversion of regular channels

        DMA2_Stream0->CR &= ~DMA_SxCR_EN;
        DMA2_Stream0->M0AR = (uint32_t)&My_mass;        
        DMA2_Stream0->NDTR = sample_size_adc; //NDT[15:0]: Number of data items to transfer
        DMA2->LIFCR |= ((1UL<<5)|(1<<4));
        ADC1->SR &= ~ADC_SR_OVR;
        ADC1->CR2 &= ~ADC_CR2_DMA;
        ADC1->CR2 |= ADC_CR2_DMA;
        DMA2_Stream0->CR |= DMA_SxCR_EN;//EN: Stream enable / flag stream ready when read low
        ADC1->CR2 |= ADC_CR2_SWSTART;