#define RBR_Interrupt_Enable (1<< 0)
#define THRE_Interrupt_Enable (1<< 1)
#define LS_Interrupt_Enable (1<< 2)
#define Receive_Line_Status 6
#define Receive_Data_Available 4
#define Character_TimeOut_Indicator 0x0C
#define THRE_Interrupt 2
#define msk_ULSR_Errors 0x9E

void UART0VectoredIRQ (void) __irq
{
char
Msg,
dummy;

if(((Msg = U0IIR) & 0x01) == 0) // Flag Status of RX Int
{
switch(Msg & 0x0E) // Filter Msg
{
case Receive_Line_Status:
if (IOPIN & LED_G)
LEDS_ON = LED_G;
else
LEDS_OFF = LED_G;

if (U0LSR & msk_ULSR_Errors)
break;
else
if ((RTS0) && (U0LSR & (1<< TEMP))) // Transmition Finish
{
// Run Tx handler
/* if (IOPIN & LED_G)
LEDS_ON = LED_G;
else
LEDS_OFF = LED_G; */
U0IER = RBR_Interrupt_Enable | LS_Interrupt_Enable;
RTS0 = 0;
break;
}

case Receive_Data_Available:
RTS0 = 1;
U0IER = THRE_Interrupt_Enable;
U0THR = U0RBR + 3;
/* if (IOPIN & LED_G)
LEDS_ON = LED_G;
else
LEDS_OFF = LED_G; */
break;
case THRE_Interrupt:
if (IOPIN & LED_G)
LEDS_ON = LED_G;
else
LEDS_OFF = LED_G;

U0IER = LS_Interrupt_Enable;
/*
if (RTS0) // Transmition
if (amount_SIO0--)
U0THR = *ptr_SIO0++;
else
dummy = U0LSR; */
break;
default:
break;
}
}
VICVectAddr = 1;// Dummy write to signal end of interrupt
}

void UART0VectoredIRQ (void) __irq
{
char
Msg,
dummy;

if(((Msg = U0IIR) & 0x01) == 0) // Flag Status of RX Int
{
switch(Msg & 0x0E) // Filter Msg
{
case Receive_Line_Status:
// if (RTS0)
if (IOPIN & LED_G)
LEDS_ON = LED_G;
else
LEDS_OFF = LED_G;

if (U0LSR & msk_ULSR_Errors)
/* if ((IOPIN & LED_G) && RTS0)
LEDS_ON = LED_G;
else
LEDS_OFF = LED_G; */

break;
else
/* if (RTS0)
{
if (IOPIN & LED_G)
LEDS_ON = LED_G;
else
LEDS_OFF = LED_G; */

if (U0LSR & (1<< TEMP)) // Transmition Finish
{
// Run Tx handler
/* if (IOPIN & LED_G)
LEDS_ON = LED_G;
else
LEDS_OFF = LED_G; */
U0IER = RBR_Interrupt_Enable | LS_Interrupt_Enable;
RTS0 = 0;
break;
}
// }

case Receive_Data_Available:
while(U0LSR & 1) // U0RBR contains valid data.
dummy = U0RBR;
// LEDS_ON = LED_G;
/* RTS0 = 1;
U0IER = 0;
U0FCR = SD_FIFO_ENABLE | SD_FIFO_RX_RESET | SD_FIFO_TX_RESET | RX_Trigger_Level1;
U0IER = THRE_Interrupt_Enable;
U0THR = U0RBR + 3;
LEDS_ON = LED_G;
if (IOPIN & LED_G)
LEDS_ON = LED_G;
else
LEDS_OFF = LED_G; */
break;
case Character_TimeOut_Indicator:
while(U0LSR & 1) // U0RBR contains valid data.
dummy = U0RBR;
// LEDS_OFF = LED_G;
LEDS_ON = LED_G;
RTS0 = 1;
U0IER = 0;
U0FCR = SD_FIFO_ENABLE | SD_FIFO_RX_RESET | SD_FIFO_TX_RESET | RX_Trigger_Level1;
break;
case THRE_Interrupt:
Msg = U0LSR;

if (Msg & (1<< THRE))
{
if (amount_SIO0--)
{
U0THR = 8;
LEDS_OFF = LED_G;
}
/* if (IOPIN & LED_G)
LEDS_ON = LED_G;
else
LEDS_OFF = LED_G; */
}

if (Msg & (1<< TEMP))
{
RTS0 = 0;
U0IER = RBR_Interrupt_Enable | LS_Interrupt_Enable;
/* if (IOPIN & LED_G)
LEDS_ON = LED_G;
else
LEDS_OFF = LED_G; */
}

break;
default:
break;
}
}
VICVectAddr = 1;// Dummy write to signal end of interrupt
}