void Write(uint32_t address, uint32_t lenght, uint8_t *buffer)
{
      // Note!!!Every write operation demands a write enable!!!
    //SPI_CSlow();
    //SPI_SendByte(SPIEEPROM_CMD_WREN);
    //SPI_CShigh();

    // start write
    SPI_CSlow();
    // send write command
    SPI_SendByte(SPIEEPROM_CMD_WRITE);
    // send address
    SPI_SendByte(address>>8);
    SPI_SendByte(address&0x00FF);
    while(lenght--)
    {
        // send data to be written
         SPI_SendByte(*buffer++);
    }
    // stop write
    SPI_CShigh();
}

void Read(uint32_t address, uint32_t lenght, uint8_t *buffer)
{
    if(lenght>PAGE_SIZE)
        return 0;
    uint32_t data;
    // start read
    SPI_CSlow();
    // send command
    SPI_SendByte(SPIEEPROM_CMD_READ);
    // send address
    SPI_SendByte(address>>8);
    SPI_SendByte(address&0x00FF);
    // read contents of memory address
    while(lenght--)
    {
        data = SPI_TransferByte(0x00);
        *buffer++ = data;
    }
    // stop read
    SPI_CShigh();
}

/*Привязка к линиям микроконтроллера*/
#define SRAM_SPI SPIC //Регистр SPI
#define SRAM_PORT PORTC //PORT SPI
#define SRAM_CS_PORT PORTC //Доступ к чипу
#define SRAM_CS_PIN 3
#define SRAM_HOLD_PORT PORTC //Запрет записи
#define SRAM_HOLD_PIN 4
#define SRAM_MOSI_PORT PORTC //MOSI
#define SRAM_MOSI_PIN 5
#define SRAM_MISO_PORT PORTC //MISO
#define SRAM_MISO_PIN 6
#define SRAM_SCK_PORT PORTC //SCK
#define SRAM_SCK_PIN 7


void SRAM_Init(void){
    SRAM_SPI.DATA = 0;
    SRAM_PORT.DIR &= ~(1 << SRAM_MISO_PIN);
    SRAM_PORT.DIR |= (1 << SRAM_HOLD_PIN) | (1 << SRAM_MOSI_PIN) | (1 << SRAM_SCK_PIN) | (1 << SRAM_CS_PIN);
    SRAM_SPI.CTRL = SPI_ENABLE_bm | SPI_MASTER_bm | SPI_MODE_0_gc | SPI_PRESCALER_DIV128_gc;
    SRAM_HOLD_PORT.OUT |= (1 << SRAM_HOLD_PIN);
    SRAM_CS_PORT.OUT &= ~(1 << SRAM_CS_PIN);
    _delay_us(1);
    SRAM_SPI.DATA = 0x1;
    while(!(SPIC.STATUS & (1<<7)));
    SRAM_SPI.DATA = 0x0;
    while(!(SPIC.STATUS & (1<<7)));
    SRAM_CS_PORT.OUT |= (1 << SRAM_CS_PIN);
}
uint8_t SRAM_Write(uint16_t addr, uint8_t data){
    SRAM_CS_PORT.OUT &= ~(1 << SRAM_CS_PIN);
    _delay_us(1);
    SRAM_SPI.DATA = 0x2;
    while(!(SPIC.STATUS & (1<<7)));
    SRAM_SPI.DATA = addr >> 8;
    while(!(SPIC.STATUS & (1<<7)));
    SRAM_SPI.DATA = addr & 0xFF;
    while(!(SPIC.STATUS & (1<<7)));
    SRAM_SPI.DATA = data;
    while(!(SPIC.STATUS & (1<<7)));
    SRAM_CS_PORT.OUT |= (1 << SRAM_CS_PIN);
    return SPIC.DATA;
}
uint8_t SRAM_Read(uint16_t addr){
    SRAM_CS_PORT.OUT &= ~(1 << SRAM_CS_PIN);
    _delay_us(1);
    SRAM_SPI.DATA = 3;
    while(!(SPIC.STATUS & (1<<7)));
    SRAM_SPI.DATA = addr >> 8;
    while(!(SPIC.STATUS & (1<<7)));
    SRAM_SPI.DATA = addr & 0xFF;
    while(!(SPIC.STATUS & (1<<7)));
    SRAM_CS_PORT.OUT |= (1 << SRAM_CS_PIN);
    return SRAM_SPI.DATA;
    
}