Код
void initialize(void)
{
CPUCS = 0x10; // 48 MHz, CLKOUT output disabled.
IFCONFIG=0xCB; // Internal IFCLK, 48MHz; A,B as normal ports; async; slave fifo
SYNCDELAY;
REVCTL = 0x03; // See TRM...
SYNCDELAY;
EP2CFG = 0xFA; // 1111 1010 (interrupt IN, 1024 bytes, double-buffered)
SYNCDELAY;
FIFORESET = 0x80; SYNCDELAY; // NAK all requests from host.
FIFORESET = 0x82; SYNCDELAY; // Reset individual EP (2,4,6,8)
FIFORESET = 0x84; SYNCDELAY;
FIFORESET = 0x86; SYNCDELAY;
FIFORESET = 0x88; SYNCDELAY;
FIFORESET = 0x00; SYNCDELAY; // Resume normal operation.
EP2FIFOCFG = 0x0D; // 0000 1101 (autoin, zerolenin, 16bit bus)
SYNCDELAY;
PORTACFG = 0x00; //
SYNCDELAY;
FIFOPINPOLAR = 0x3F; //0011 1111 (active high FF, EF, SLWR, SLRD, SLOE, PKTEND)
SYNCDELAY;
EP2AUTOINLENH = 0x04;
SYNCDELAY;
EP2AUTOINLENL = 0x00;
SYNCDELAY;
PINFLAGSAB = 0xC8; //FLAGA = EF - EP2; FLAGB = FF - EP2
SYNCDELAY;
PINFLAGSCD = 0xFB; //FLAGC = EF - EP8; FLAGD = FF - EP8
SYNCDELAY;
OUTPKTEND = 0x82; SYNCDELAY;
OUTPKTEND = 0x82; SYNCDELAY;
}
{
CPUCS = 0x10; // 48 MHz, CLKOUT output disabled.
IFCONFIG=0xCB; // Internal IFCLK, 48MHz; A,B as normal ports; async; slave fifo
SYNCDELAY;
REVCTL = 0x03; // See TRM...
SYNCDELAY;
EP2CFG = 0xFA; // 1111 1010 (interrupt IN, 1024 bytes, double-buffered)
SYNCDELAY;
FIFORESET = 0x80; SYNCDELAY; // NAK all requests from host.
FIFORESET = 0x82; SYNCDELAY; // Reset individual EP (2,4,6,8)
FIFORESET = 0x84; SYNCDELAY;
FIFORESET = 0x86; SYNCDELAY;
FIFORESET = 0x88; SYNCDELAY;
FIFORESET = 0x00; SYNCDELAY; // Resume normal operation.
EP2FIFOCFG = 0x0D; // 0000 1101 (autoin, zerolenin, 16bit bus)
SYNCDELAY;
PORTACFG = 0x00; //
SYNCDELAY;
FIFOPINPOLAR = 0x3F; //0011 1111 (active high FF, EF, SLWR, SLRD, SLOE, PKTEND)
SYNCDELAY;
EP2AUTOINLENH = 0x04;
SYNCDELAY;
EP2AUTOINLENL = 0x00;
SYNCDELAY;
PINFLAGSAB = 0xC8; //FLAGA = EF - EP2; FLAGB = FF - EP2
SYNCDELAY;
PINFLAGSCD = 0xFB; //FLAGC = EF - EP8; FLAGD = FF - EP8
SYNCDELAY;
OUTPKTEND = 0x82; SYNCDELAY;
OUTPKTEND = 0x82; SYNCDELAY;
}