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Полная версия этой страницы: Fabrication drawing
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KostyantynT
Решили все проекты сопровождать этим документом, вместо кучи readme файлов. За основу взяли темплейты из ментора. Нашел в сети интересное обсуждение http://www.microwavejournal.com/blogs/2-ju...nd-fab-drawings. Интересно поделиться опытом и наработками.

Для себя взяли вот такую форму PCB notes, просьба покритиковать:

Notes: (unless otherwise specified)

1. Millimeters (mm) are the controlling dimensions for the drawings and supplied data. Inch dimensions are for reference only.

2. Fabricate PCB in accordance with IPC-6012A, Class 2; per IPC-6011 using customer supplied
data files.

3. Materials:

A) Laminate and Prepreg (B-stage) to be in accordance with IPC-4101/23 or IPC-4101/24.
Material must meet UL 94V-0 flammability rating. FR406 material with a Tg of 170C or
greater is recommended.

B) Copper foil to be in accordance with IPC-MF-150. Unless otherwise specified, all
copper weight for inner signal layers to be 18um (0.5 oz). Inner plane layers to be 35um
(1 oz.). For outer layers 53um (1.5 oz). Copper weight is to be considered "finished".

4. All holes shall be located within 0.2 (0.008") Diameter of True Position. Layer to layer
registration shall be within 0.125 (0.005").

5. Finish:

A) All exposed conductive pattern areas not covered with solder mask or other plating shall be:

a. Hot Air Solder Leveled using SN63A Tin Lead Solder, per ANSI/J-STD-006 (HASL)
b. Plated with Organic Surface Protectant (OSP)
c. Plated with Immersion Gold over Electrolysis Nickel over copper (NiAu)
d. Plated with Immersion White Tin (IWT)
e. Plated with Immersion Silver (IAg)

B) Apply liquid photo imageable solder mask (color green) per IPC-SM-840, class H, to
both sides of the board over bare copper. Via holes covered with solder mask do not
need to be plugged. Only solder mask images that are the same size as the component
pads may be enlarged, and shall not be enlarged beyond 0.08 (0.003") per side or 0.15
(0.006") overall. All other solder mask images shall not be enlarged.

C) Silkscreen shall be white, permanent, organic, non-conductive ink. There shall be no
silkscreen on any solderable component pad.

6. Marking:

A) Board part number and revision letter is rendered in etch on the bottom side of the
board. Revision letter should be identical to this drawing.

B) UL logo, manufacturer's identification and date code letter shall be rendered in etch on
the bottom side of the board approximately where shown.

7. Test requirements:

A) 100% netlist electrical verification using customer supplied IPC-D-356 netlist for opens
and shorts when "Gerber Data" is provided. All nets shall be accessed simultaneously
or as otherwise mutually agreed upon. This verification is not necessary when ODB++
data is provided.

B) HiPot test all prepreg/core material less than 0.1 (0.004") thick at 500 VDC for 30
seconds minimum. Test should be done at the layer stage and again prior to
packaging.

8. Tolerances:

A) Warp or twist of board shall not exceed 1%.
B) Conductor widths and spacing shall be within +-0.03 (0.001") of Gerber data.
C) Remove all burrs and break sharp edges 0.4 (0.015") maximum.
D) Surface Mount Pad plating must be flat to a maximum of 0.08 (0.003") above board
surface.
E) 1.5 (0.06") maximum radius on any inside corner.
F) Controlled impedance:

a. 50 Ohms on outer layers. Impedance structure defined as xxmm microstrip
referenced to nearest plane.
b. 50 Ohms on inner layers. Impedance structure defined as xxmm stripline
referenced to layers x and x.

9. Thieving:

A) Supplier may add thieving to compensate for low copper density areas on this design.
B) The following guidelines must be adhered to in order to maintain electrical and
mechanical integrity of the design:
a. Thieving to card edge spacing 2.5 (0.100") minimum.
b. Thieving to Fiducial spacing 5 (0.200") minimum.
c. Thieving to non-plated through holes 5 (0.200") minimum.
d. Thieving to all other features 2.5 (0.100") minimum.
e. There shall be no exposed thieving in any areas free of solder mask or
internal copper plane.

10. Plate Edge Connector 0.8um (0.00003") minimum gold thickness over 2.5um (0.0001")
minimum low stress nickel.
Chopr39
Добрый день, как ваши успехи на поприще выпуска Fabrication drawings? Получили обратную связь от производства? Обратил внимание, что вы ссылаетесь на далеко не свежие ревизии стандартов. Например IPC-6012A был выпущен в 99 году, т.е 17 лет назад. Последняя ревизия IPC-6012D прошлогодняя. В свободном доступе легко можно найти ревизию B.
IPC-MF-150 c 2000 года поглощён стандартом IPC-4562 и т.д.
KostyantynT
Цитата(Chopr39 @ Sep 30 2016, 17:16) *
Добрый день, как ваши успехи на поприще выпуска Fabrication drawings? Получили обратную связь от производства? Обратил внимание, что вы ссылаетесь на далеко не свежие ревизии стандартов. Например IPC-6012A был выпущен в 99 году, т.е 17 лет назад. Последняя ревизия IPC-6012D прошлогодняя. В свободном доступе легко можно найти ревизию B.
IPC-MF-150 c 2000 года поглощён стандартом IPC-4562 и т.д.

Добрый день,
На стандарты китайцы не смотрят. Основное - размеры, покрытие, маска, стакап, контроль импеданса. За замечание - спасибо, заменю в темплейте.
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