DATE: 10-7-2016    HOTFIX VERSION: 006
================================================================================
===================================================
CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
================================================================================
===================================================
1585203 ADW            DBEDITOR         Optimize check-in of footprints with multiple padstacks
1607954 ALLEGRO_EDITOR SHAPE            Dynamic Shape not updating correctly
1618173 ADW            SRM              SRM does not automatically run when a .brd file is opened from EDM Flow Manager in 17.2 Hotfix 003
1618832 ADW            SRM              SRM marks parts as updated even when they are not updated
1623823 SIP_LAYOUT     WIREBOND         NO_WIREBOND property is ignored by Add/Edit Non-Standard
1626001 ALLEGRO_EDITOR SHAPE            Shape to route keepout DRCs reported for dynamic shapes in the attached design
1626546 SIG_INTEGRITY  FIELD_SOLVERS    Extra RL elements in via spice circuit model generated by Via Model Generator
1631792 SCM            OTHER            The NC net has re-attached itself to another net, RIGHT_LEFT_N, in the design
1632223 ADW            LRM              Checking in a hierarchy causes a crash
1632844 F2B            DESIGNVARI       Part is simultaneously defined as Pref and DNI in Variant Editor with no error
1633647 ALLEGRO_EDITOR MANUFACT         Variant issue: Create Assembly Drawing command not creating filled shapes for keying pegs in attached design
1633707 ALLEGRO_EDITOR DATABASE         Cannot remove Route_Keepout associated with a pin
1634392 PCB_LIBRARIAN  OTHER            Launching Library Explorer without -proj option crashes the tool
1635049 CONSTRAINT_MGR CONCEPT_HDL      DE-HDL crashes when trying to create layer set from Constraint Manager
1635593 ORBITIO        ALLEGRO_SIP_IF   Importing  .sip file reports undefined argument error while processing shapes
1635858 ALLEGRO_EDITOR ARTWORK          Get 'WARNING: Null REGULAR-PAD specified for padstack' messages in log file when generating artwork for all layers
1636097 ALLEGRO_EDITOR ZONES            Technology Dependent Packaging footprints not updating in the design
1636185 ALLEGRO_EDITOR ZONES            Import Placement not placing TDP footprints in zone
1636867 CONSTRAINT_MGR OTHER            Millimeters shown as mils in the Analysis Modes dialog box
1638094 SIP_LAYOUT     OTHER            Cross Section Editor not seeing updated information
1639845 ALLEGRO_EDITOR INTERFACES       Step file not generated when board is exported to a folder with special characters in name
1640611 APD            SKILL            Launching XtractIM from SiP Layout with the attached design crashes both SiP Layout and XtractIM
1641339 ALLEGRO_EDITOR INTERFACES       DXF_IN does not show all the subclasses available in the design
1641879 XTRACTIM       GUI              XtractIM crashes on extracting a SiP Layout design if 'SI Ignore' is selected for a die stack layer in Cross Section Editor
1642012 CONCEPT_HDL    CONSTRAINT_MGR   Schematic-defined net groups without any members cannot be deleted in Constraint Manager
1642015 CONCEPT_HDL    CORE             Pin exists on block but no corresponding port exists in the underlying schematic
1642597 ALLEGRO_EDITOR OTHER            Importing .tdp file: Footprints not included in the .tdp file are updated in the design
1643557 SIP_LAYOUT     DIE_GENERATOR    Die Text files will not update the design
1646086 ASDA           IMPORT_BLOCK     Importing a DE-HDL design into SDA results in error 'IMPSHT-42 Alias cannot be created'
1647580 ASDA           IMPORT_PCB       SDA - File Import from PCB Editor has duplicated RefDes on schematic.