;Set up PLL:
;make PLL DRATIO and MRATIO values and load PLL IC.
;Input: Frx - RX frequency, Hz
; const Fif - RX first IF frequency, Hz
; const Fosc - PLL oscillator frequency, Hz
; const Fc   - reference frequency, Hz
;
;Frx = Fvco - Fif
;Fvco = Fc * MRATIO
;Fc = Fosc / DRATIO

SetPLL:    

;DRATIO = Fosc / Fc

.equ    DR = Fosc/Fc

    ldi    XL,DRATIO
    ldi    temp,byte1(DR)
    st    X+,temp
    ldi    temp,byte2(DR)
    st    X+,temp

;Fvco = Frx + Fif

    ldi    XL,Frx
    ld    temp,X+
    subi    temp,byte1(-Fif)
    mov    Res1,temp
    ld    temp,X+
    sbci    temp,byte2(-Fif)
    mov    Res2,temp
    ld    temp,X+
    sbci    temp,byte3(-Fif)
    mov    Res3,temp
    ld    temp,X+
    sbci    temp,byte4(-Fif)
    mov    Res4,temp

;MRATIO = Fvco / Fc

    ldxy    (Fc)
    mov    Stp1,XL
    mov    Stp2,XH
    mov    Stp3,YL
    mov    Stp4,YH
    rcall    Div32    ;Res4:3:2:1 / Stp4:3:2:1 = Res4:3:2:1
    ldi    XL,MRATIO
    st    X+,Res1
    st    X+,Res2
    st    X+,Res3

;load PLL IC:

    rcall    Wr_PLL
    ret

;Load Res4:3:2:1 from [X]:

LdRes:    ld    Res1,X+
    ld    Res2,X+
    ld    Res3,X+
    ld    Res4,X+
    ret

;Motorola MC12202 synthesizer load:
;
;Input: DRATIO =    8..16383  (2 bytes)
;       MRATIO = 1024..262143 (3 bytes)
;Out:        C = 1 if error
;
; F_r, F_p = F_osc / DRATIO
; F_vco = F_r, F_p * MRATIO
;
;DRATIO -> R, MRATIO -> P,N,A
;
;Note: since A should be less then N there are
;missing codes in 1024..4095 MRATIO range.
;Missing codes are indicated with C = 1 (and
;synthesizer is not loaded). In the same manner
;is indicated out of range for DRATIO or MRATIO.

Wr_PLL:    lds    XL,MRATIO+1
    lds    XH,MRATIO+2

;Check MRATIO for 1024..262143

    andi    XL,0xfc
    or    XL,XH
    brne    Mlk    ;error if MRATIO < 1024 (400H)
    sec        ;set error flag
    ret        ;return to the caller
    
Mlk:    andi    XH,0xfc
    breq    Mgk    ;error if MRATIO > 262143 (3FFFFH)
    sec        ;set error flag
    ret        ;return to the caller

;Check MRATIO and choose P
;Prescaler = 128 if MRATIO > 16383 (N > 127)
;Prescaler = 64  if MRATIO < 16384 (N < 128)
    
Mgk:    lds    XL,MRATIO+1
    lds    XH,MRATIO+2
    andi    XL,0xc0
    or    XL,XH
    in    temp,SREG
    bst    temp,1    ;T <- Z

;Prescaler = 128 flag T = 0, Prescaler = 64 flag T = 1
;A_counter = (MRATIO MOD 128) for Prescaler = 128
;A_counter = (MRATIO MOD 64)  for Prescaler = 64
    
    lds    temp,MRATIO+0
    andi    temp,0x7f;if P = 128 A_counter = MRATIO+0 & 0x7f
    brtc    P_128
    andi    temp,0x3f;if P = 64  A_counter = MRATIO+0 & 0x3f

P_128:    lds    XH, MRATIO+2
    lds    XL, MRATIO+1
    lds    Cnt,MRATIO+0

    brts    P_64
    ror    XH    ;if P = 128 MRATIO >> 2
    ror    XL
    ror    Cnt

P_64:    ror    XH    ;if P = 64  MRATIO >> 1
    ror    XL
    ror    Cnt

    andi    Cnt,0xe0
    mov    XH,XL
    mov    XL,Cnt    ;XH:XL = N18..N8,0,0,0,0,0
    push    XH    ;_stack = 1 (N18..N11)
    push    XL    ;_stack = 2 (N10..N8,0,0,0,0,0)

;temp = A_counter, XH:XL = N18..N8,0,0,0,0,0
;Check for A_counter < N

    ldi    Cnt,3
N_sh:    rol    XL    ;N <<
    rol    XH
    brcs    Aok    ;jump if N > A_counter (N > 255)
    dec    Cnt
    brne    N_sh    
    cp    temp,XH
    brlo    Aok    ;error if A_counter >= N
    pop    XL    ;_stack = 1
    pop    XH    ;_stack = 0
    sec        ;set error flag
    ret        ;return to the caller
    
;Shift A_counter

Aok:    clc
    ldi    XL,0
    ldi    Cnt,2
A_sh:    ror    temp
    ror    XL
    dec    Cnt
    brne    A_sh
    mov    Cnt,XL    ;temp:Cnt = A_counter >> 2

;Combine N18..N8 and A_counter

    pop    XL    ;_stack = 1 (N10..N8,0,0,0,0,0)
    or    XL,temp
    push    XL    ;_stack = 2 (N10..N8,A7..A3)
    push    Cnt    ;_stack = 3 (A2,A1,0,0,0,0,0,0)

;_stack[1]:_stack[2]:_stack[3] ready to load PROGRAMMABLE DIVIDER

    lds    XL,DRATIO+0
    lds    XH,DRATIO+1
    
;Check DRATIO for 8..16383

    andi    XL,0xf8
    or    XL,XH
    brne    Dlk    ;error if DRATIO < 8 (08H)
    pop    Cnt    ;_stack = 2
    pop    XL    ;_stack = 1
    pop    XH    ;_stack = 0
    sec        ;set error flag
    ret        ;return to the caller

Dlk:    andi    XH,0xc0
    breq    Dgk    ;error if DRATIO > 16383 (3FFFH)
    pop    Cnt    ;_stack = 2
    pop    XL    ;_stack = 1
    pop    XH    ;_stack = 0
    sec        ;set error flag
    ret        ;return to the caller
    
;Shift DRATIO and combine it with SW (T flag)

Dgk:    lds    XL,DRATIO+0
    lds    XH,DRATIO+1
    sec
    rol    XL
    rol    XH
    bld    XH,7    ;XH.7 <- T, XH:XL = SW,R14..R1,1

;XH:XL = SW,R14..R1,1 - ready to load PROGRAMMABLE REFERENCE DIVIDER

;Load PROGRAMMABLE REFERENCE DIVIDER

    mov    temp,XH
    ldi    Cnt,8    ;bit count
    rcall    Ld_PLL    ;load SW,R14..R8
    mov    temp,XL
    ldi    Cnt,8    ;bit count
    rcall    Ld_PLL    ;load R7..R1,1

    sbi    PORTD,LE
    nop
    cbi    PORTD,LE

;Load PROGRAMMABLE DIVIDER

    pop    XL    ;_stack = 2 (A2,A1,0)
    pop    XH    ;_stack = 1 (N10..N8,A7..A3)
    pop    temp    ;_stack = 0 (N18..N11)
    ldi    Cnt,8    ;bit count
    rcall    Ld_PLL    ;load N18..N11
    mov    temp,XH
    ldi    Cnt,8    ;bit count
    rcall    Ld_PLL    ;load N10..N8,A7..A3
    mov    temp,XL
    ldi    Cnt,3    ;bit count
    rcall    Ld_PLL    ;load A2,A1,0

    sbi    PORTD,LE
    nop
    cbi    PORTD,LE

    clc        ;clear error flag
    ret        ;return to the caller

;Loads data to MC12202 via serial bus
;Input: temp - data, Cnt - bit count

Ld_PLL:    rol    temp
    brcc    DATA0
    sbi    PORTD,DATA;DATA <- 1
    rjmp    DNE
DATA0:    cbi    PORTD,DATA;DATA <- 0
    nop
DNE:    sbi    PORTD,CLK;CLK  <- 1
    nop
    cbi    PORTD,CLK;CLK  <- 0
    dec    Cnt
    brne    Ld_PLL
    cbi    PORTD,DATA;DATA <- 1
    ret