Пишу контроллёр под SDRAM почитав pdf по Micron:
AUTO REFRESH is used during normal operation of the SDRAM and is analogous to
CAS#-BEFORE-RAS# (CBR) refresh in conventional DRAMs. This command is nonpersistent,
so it must be issued each time a refresh is required. All active banks must be
PRECHARGED prior to issuing an AUTO REFRESH command. The AUTO REFRESH
command should not be issued until the minimum tRP has been met after the
PRECHARGE command as shown in the Operation section.
The addressing is generated by the internal refresh controller. This makes the address
bits “Don’t Care” during an AUTO REFRESH command. Regardless of device width, the
64Mb SDRAM requires 4,096 AUTO REFRESH cycles every 64ms (commercial and industrial)
or 16ms (automotive). Providing a distributed AUTO REFRESH command every
15.625μs (commercial and industrial) or 3.906μs (automotive) will meet the refresh
requirement and ensure that each row is refreshed. Alternatively, 4,096 AUTO REFRESH
commands can be issued in a burst at the minimum cycle rate (tRFC), once every 64ms
(commercial and industrial) or 16ms (automotive).
Как я понял нужно каждые 64мс подавать 4096 команд с интервалом tRP,но ведь в этом случае время когда память будет не доступна (60нс*4096+4096*7нс(мин время одного такта)=274432нс=274мкс)...или я что-то не так понял?