#include <avr/io.h>
#include <avr/interrupt.h>
#include <avr/eeprom.h>
#define F_CPU 12500000UL  // 12.5 MHz
#include <util/delay.h>
#include <inttypes.h>
#include <stdlib.h> // atoi
#include <string.h>
#include "timeout.h"
#include "avr_compat.h"

//SPI port define
#define SPI_PORT PORTB
#define SPI_DDR DDRB
#define MOSI_P PB3
#define MISO_P PB4
#define SCK_P PB5
#define SS_P PB2
#define SELECT() SPI_PORT &= ~(1 << SS_P)
#define DESELECT() SPI_PORT |= (1 << SS_P)

//ADS1256 define
#define F_ADS1256 7680000UL
#define      WAKEUP   0x00
#define      RDATA   0x01
#define      RDATAC   0x03
#define      SDATAC   0x0F
#define      RREG   0x10
#define      WREG   0x50
#define      SELFCAL   0xF0
#define      SYNC   0xFC
#define      STDBY   0xFD
#define      RESET   0xFE

void SPI_init(void) {

    SPI_DDR = (1 << MOSI_P)|(1 << SCK_P)|(1 << SS_P);
    SPI_PORT = (1 << SS_P);
    //Enable SPI, Master, set clock rate fck/128,SPI mode 1 (CPOL=0, CPHA=1)
    SPCR = (1 << SPE)|(1 << MSTR)|(1 << SPR1)|(1 << SPR0)|(0 << CPOL)|(1 << CPHA);
}

void init_all(void){

        SPI_init();
        /***enable interrupt***/
        sei();
}

int main(void){

        uint8_t SPI_buf[3];
        SPI_buf[0]=0x00;
        SPI_buf[1]=0x00;
        SPI_buf[2]=0x00;
        uint8_t j=0;
        init_all();
        while(1){
                if (j < 5){

                        SELECT();

                        SPDR = (RREG | 0x00);           //(RREG | 0x00) Read from register with starting at address 0x00
                        while(!(SPSR & (1 << SPIF)));
                        _delay_us(5);

                        SPDR = 0x02;                    //Read 3 register
                        while(!(SPSR & (1 << SPIF)));
                        _delay_us(250);                 //*ADS1256 t6 VERY IMPORTANT* min_us=t6/F_ADS1256=50/7.68MHz=7us

                        SPDR = 0xAB;
                        while(!(SPSR & (1 << SPIF)));
                        SPI_buf[0]=SPDR;
                        _delay_us(5);

                        SPDR = 0xAB;
                        while(!(SPSR & (1 << SPIF)));
                        SPI_buf[1]=SPDR;
                        _delay_us(5);

                        SPDR = 0xAB;
                        while(!(SPSR & (1 << SPIF)));
                        SPI_buf[2]=SPDR;
                        _delay_us(5);

                        DESELECT();

                        eeprom_write_byte (10*j,0xAA);
                        eeprom_write_byte (10*j+1,SPI_buf[0]);
                        eeprom_write_byte (10*j+2,SPI_buf[1]);
                        eeprom_write_byte (10*j+3,SPI_buf[2]);
                        eeprom_write_byte (10*j+5,0xCC);
                        j++;
                }
              ;
        }                       //end while(1)
        return (0);
}                               //end main

void SPI_init(void) {

    SPI_DDR = (1 << MOSI_P)|(1 << SCK_P)|(1 << SS_P);
    SPI_PORT = (1 << SS_P);
    //Enable SPI, Master, set clock rate fck/128,SPI mode 1 (CPOL=0, CPHA=1)
    SPCR = (1 << SPE)|(1 << MSTR)|(1 << SPR1)|(1 << SPR0)|(0 << CPOL)|(1 << CPHA);
}

void SPI_init(void) {

    SPI_DDR |= (1 << MOSI_P)|(1 << SCK_P)|(1 << SS_P);
    SPI_PORT |= (1 << SS_P);
    //Enable SPI, Master, set clock rate fck/128,SPI mode 1 (CPOL=0, CPHA=1)
    SPCR |= (1 << SPE)|(1 << MSTR)|(1 << SPR1)|(1 << SPR0)|(1 << CPHA);
SPCR &= ~(1 << CPOL);
}