device 1,2 -xcf04s, 3 - xc2vp20. Jtag заливает flash отлично. Правда Paral Cale IV работает в компат. моде.
В debug Config в пункте Debug Software Application в ppc405_0 в окне Basic черный пустой квадрат -- ???
В проекте default ppc405_0_bootlop не замаркирован для загрузки в буф-рам, а все тесты грузатся в нее.
Что не так???
Вот нашел у производителя:
10.1 EDK, XMD - "ERROR: Unable to connect to PowerPC target. Invalid Processor Version No 0x00000000"
AR# 18265
Part EDK-xmd
Last Modified 2008-03-24 00:00:00.0
Status Active
Keywords JTAG, PPC, debug, 405, connection, ppcconnect
Description
Keywords: JTAG, PPC, debug, 405, connection, ppcconnect
When I attempt to debug a PowerPC via the XMD ppcconnect command, the following error occurs:
"JTAG chain configuration
--------------------------------------------------
Device....ID Code........IR Length...Part Name
1............05026093.....8.................XC18V04
2............05026093.....8.................XC18V04
3............0127e093.....14...............XC2VP30
ERROR: Unable to connect to PowerPC target. Invalid Processor Version No 0x00000000
Unable to establish connection to the PowerPC target.
Make sure the PPC405 JTAG signals are connected to the JTAGPPC primitive and the cable connections are correct."
How do I resolve this error and connect to the PowerPC?
Solution
Note that XMD is able to detect the instruction registers of the XC2VP30 (6 bits) along with its two processors in the chain (4 bits each). This indicates that the basic JTAG chain and cable connections are likely correct. However, the processors are not responding to the other JTAG requests.
Check Processor Clocks
Ensure that CPMC405CLOCK has a valid clock, and that the CPMC405CPUCLKEN and CPMC405JTAGCLKEN ports are High. While the PowerPC JTAG controller is clocked by the JTAG clock, the requests from the JTAG unit are serviced by the core clock. If you are using a DCM, check the LOCKED and STATUS ports. Consider connecting the DCM LOCKED signal to the PROC_SYS_RESET EDK IP core.
When probing nets, note that the PPC405 block might have local inversion on some input ports. Check the polarity of individual nets by double-clicking into the PPC405 block in FPGA Editor.
Check Processor Resets
Ensure that the RSTC405RESETCORE, RSTC405RESETCHIP, and RSTC405RESETSYS signals are Low. Make sure the active-low port JTGC405TRSTNEG is High.
Check JTAG Connections
Verify the JTAG chain and cable connections. The JTAG chain connections are especially suspect if XMD cannot detect the IDCODE and IR lengths. A correctly connected JTAG chain should report the correct Device, ID Code, and IR Length for a particular hardware chain, similar to the above error message.
Check iMPACT Options
Use the "Pulse Prog" option in iMPACT. For Virtex-II Pro or Virtex-4 devices, check the Virtex-II "Pulse Prog" check box in iMPACT. Re-download the bitstream and connect via XMD.
To enable the option in EDK, the download.cmd file in the etc directory has to be modified:
Before:
======
setMode -bscan
setCable -p auto
identify
assignfile -p 2 -file implementation/download.bit
program -p 2
quit
After:
====
setMode -bscan
setCable -p auto
identify
assignfile -p 2 -file implementation/download.bit
program -p 2 -prog
quit
Check UCF constraints
If the design was brought into ISE from EDK, ensure that the UCF has been included in the ISE project.
Check the cable type
Determine whether the download cable you have connected to your computer matches the cable type designated in your EDK XMD project options file or "XMD.ini" file.
1. The xmd options file can be found in the directory "<project_dir>/etc/xmd_ppc*.opt"
- If the cable type does not match, delete the file and relaunch XMD from the EDK GUI button
- Then select the proper cable type from the dialog pop-up
2. The "xmd.ini" file can be found in the directory "<project_dir>/xmd.ini"
- Edit the file with the correct cable type, port, and frequency as shown below:
- [-cable type <Xilinx_parallel | Xilinx_parallel3 | Xilinx_platform | usb >
- port <lpt1 | lpt2 | USB2>
- frequency <Cable Frequency>
For Virtex-4 devices, refer to (Xilinx Answer 21820) and (Xilinx Answer 21296).
Additionally, for PPC405, see (Xilinx Answer 22179) and (Xilinx Answer 21820).
For more information on PowerPC 405 functionality, consult the PowerPC 405 Processor Block Reference Guide.
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Нашел у производителя:
10.1 EDK, XMD - "ERROR: Unable to connect to PowerPC target. Invalid Processor Version No 0x00000000"
AR# 18265
Part EDK-xmd
Last Modified 2008-03-24 00:00:00.0
Status Active
Keywords JTAG, PPC, debug, 405, connection, ppcconnect
Description
Keywords: JTAG, PPC, debug, 405, connection, ppcconnect
When I attempt to debug a PowerPC via the XMD ppcconnect command, the following error occurs:
"JTAG chain configuration
--------------------------------------------------
Device....ID Code........IR Length...Part Name
1............05026093.....8.................XC18V04
2............05026093.....8.................XC18V04
3............0127e093.....14...............XC2VP30
ERROR: Unable to connect to PowerPC target. Invalid Processor Version No 0x00000000
Unable to establish connection to the PowerPC target.
Make sure the PPC405 JTAG signals are connected to the JTAGPPC primitive and the cable connections are correct."
How do I resolve this error and connect to the PowerPC?
Solution
Note that XMD is able to detect the instruction registers of the XC2VP30 (6 bits) along with its two processors in the chain (4 bits each). This indicates that the basic JTAG chain and cable connections are likely correct. However, the processors are not responding to the other JTAG requests.
Check Processor Clocks
Ensure that CPMC405CLOCK has a valid clock, and that the CPMC405CPUCLKEN and CPMC405JTAGCLKEN ports are High. While the PowerPC JTAG controller is clocked by the JTAG clock, the requests from the JTAG unit are serviced by the core clock. If you are using a DCM, check the LOCKED and STATUS ports. Consider connecting the DCM LOCKED signal to the PROC_SYS_RESET EDK IP core.
When probing nets, note that the PPC405 block might have local inversion on some input ports. Check the polarity of individual nets by double-clicking into the PPC405 block in FPGA Editor.
Check Processor Resets
Ensure that the RSTC405RESETCORE, RSTC405RESETCHIP, and RSTC405RESETSYS signals are Low. Make sure the active-low port JTGC405TRSTNEG is High.
Check JTAG Connections
Verify the JTAG chain and cable connections. The JTAG chain connections are especially suspect if XMD cannot detect the IDCODE and IR lengths. A correctly connected JTAG chain should report the correct Device, ID Code, and IR Length for a particular hardware chain, similar to the above error message.
Check iMPACT Options
Use the "Pulse Prog" option in iMPACT. For Virtex-II Pro or Virtex-4 devices, check the Virtex-II "Pulse Prog" check box in iMPACT. Re-download the bitstream and connect via XMD.
To enable the option in EDK, the download.cmd file in the etc directory has to be modified:
Before:
======
setMode -bscan
setCable -p auto
identify
assignfile -p 2 -file implementation/download.bit
program -p 2
quit
After:
====
setMode -bscan
setCable -p auto
identify
assignfile -p 2 -file implementation/download.bit
program -p 2 -prog
quit
Check UCF constraints
If the design was brought into ISE from EDK, ensure that the UCF has been included in the ISE project.
Check the cable type
Determine whether the download cable you have connected to your computer matches the cable type designated in your EDK XMD project options file or "XMD.ini" file.
1. The xmd options file can be found in the directory "<project_dir>/etc/xmd_ppc*.opt"
- If the cable type does not match, delete the file and relaunch XMD from the EDK GUI button
- Then select the proper cable type from the dialog pop-up
2. The "xmd.ini" file can be found in the directory "<project_dir>/xmd.ini"
- Edit the file with the correct cable type, port, and frequency as shown below:
- [-cable type <Xilinx_parallel | Xilinx_parallel3 | Xilinx_platform | usb >
- port <lpt1 | lpt2 | USB2>
- frequency <Cable Frequency>
For Virtex-4 devices, refer to (Xilinx Answer 21820) and (Xilinx Answer 21296).
Additionally, for PPC405, see (Xilinx Answer 22179) and (Xilinx Answer 21820).
For more information on PowerPC 405 functionality, consult the PowerPC 405 Processor Block Reference Guide.
Попробую исправить.....java script:emoticon(':)', 'smid_2')