TACTL_bit.TAMC = 3;

__no_init volatile union
{
  unsigned short TACTL;  /* Timer A Control */
  
  struct
  {
    unsigned short TAIFG         : 1;  /* Timer A counter interrupt flag */
    unsigned short TAIE          : 1;  /* Timer A counter interrupt enable */
    unsigned short TACLR         : 1;  /* Timer A counter clear */
    unsigned short               : 1;
    unsigned short TAMC          : 2;  /* Timer A mode control 0 */
    unsigned short TAID          : 2;  /* Timer A clock input divider */
    unsigned short TASSEL        : 2;  /* Timer A clock source select */
    unsigned short               : 6;
  } TACTL_bit;  
} @ 0x0160;


enum {
  TAIFG               = 0x0001,
  TAIE                = 0x0002,
  TACLR               = 0x0004,
  TAMC                = 0x0020,
  TAID                = 0x0080,
  TASSEL              = 0x0200,
};

TACTL = (0*TAIFG) | (1*TAIE) | (1*TACLR) | (2*TAMC) и т.д.

/* Alternate register names */
#define CCTL0 TACCTL0 /* Timer A Capture/Compare Control 0 */
#define CCTL1 TACCTL1 /* Timer A Capture/Compare Control 1 */
#define CCTL2 TACCTL2 /* Timer A Capture/Compare Control 2 */
#define CCR0 TACCR0 /* Timer A Capture/Compare 0 */
#define CCR1 TACCR1 /* Timer A Capture/Compare 1 */
#define CCR2 TACCR2 /* Timer A Capture/Compare 2 */
#define CCTL0_ TACCTL0_ /* Timer A Capture/Compare Control 0 */
#define CCTL1_ TACCTL1_ /* Timer A Capture/Compare Control 1 */
#define CCTL2_ TACCTL2_ /* Timer A Capture/Compare Control 2 */
#define CCR0_ TACCR0_ /* Timer A Capture/Compare 0 */
#define CCR1_ TACCR1_ /* Timer A Capture/Compare 1 */
#define CCR2_ TACCR2_ /* Timer A Capture/Compare 2 */

#define TASSEL1 (0x0200) /* Timer A clock source select 0 */
#define TASSEL0 (0x0100) /* Timer A clock source select 1 */
#define ID1 (0x0080) /* Timer A clock input divider 1 */
#define ID0 (0x0040) /* Timer A clock input divider 0 */
#define MC1 (0x0020) /* Timer A mode control 1 */
#define MC0 (0x0010) /* Timer A mode control 0 */
#define TACLR (0x0004) /* Timer A counter clear */
#define TAIE (0x0002) /* Timer A counter interrupt enable */
#define TAIFG (0x0001) /* Timer A counter interrupt flag */

#define MC_0 (0*0x10u) /* Timer A mode control: 0 - Stop */
#define MC_1 (1*0x10u) /* Timer A mode control: 1 - Up to CCR0 */
#define MC_2 (2*0x10u) /* Timer A mode control: 2 - Continous up */
#define MC_3 (3*0x10u) /* Timer A mode control: 3 - Up/Down */
#define ID_0 (0*0x40u) /* Timer A input divider: 0 - /1 */
#define ID_1 (1*0x40u) /* Timer A input divider: 1 - /2 */
#define ID_2 (2*0x40u) /* Timer A input divider: 2 - /4 */
#define ID_3 (3*0x40u) /* Timer A input divider: 3 - /8 */
#define TASSEL_0 (0*0x100u) /* Timer A clock source select: 0 - TACLK */
#define TASSEL_1 (1*0x100u) /* Timer A clock source select: 1 - ACLK */
#define TASSEL_2 (2*0x100u) /* Timer A clock source select: 2 - SMCLK */
#define TASSEL_3 (3*0x100u) /* Timer A clock source select: 3 - INCLK */

#define CM1 (0x8000) /* Capture mode 1 */
#define CM0 (0x4000) /* Capture mode 0 */
#define CCIS1 (0x2000) /* Capture input select 1 */
#define CCIS0 (0x1000) /* Capture input select 0 */
#define SCS (0x0800) /* Capture sychronize */
#define SCCI (0x0400) /* Latched capture signal (read) */
#define CAP (0x0100) /* Capture mode: 1 /Compare mode : 0 */
#define OUTMOD2 (0x0080) /* Output mode 2 */
#define OUTMOD1 (0x0040) /* Output mode 1 */
#define OUTMOD0 (0x0020) /* Output mode 0 */
#define CCIE (0x0010) /* Capture/compare interrupt enable */
#define CCI (0x0008) /* Capture input signal (read) */
#define OUT (0x0004) /* PWM Output signal if output mode 0 */
#define COV (0x0002) /* Capture/compare overflow flag */
#define CCIFG (0x0001) /* Capture/compare interrupt flag */

#define OUTMOD_0 (0*0x20u) /* PWM output mode: 0 - output only */
#define OUTMOD_1 (1*0x20u) /* PWM output mode: 1 - set */
#define OUTMOD_2 (2*0x20u) /* PWM output mode: 2 - PWM toggle/reset */
#define OUTMOD_3 (3*0x20u) /* PWM output mode: 3 - PWM set/reset */
#define OUTMOD_4 (4*0x20u) /* PWM output mode: 4 - toggle */
#define OUTMOD_5 (5*0x20u) /* PWM output mode: 5 - Reset */
#define OUTMOD_6 (6*0x20u) /* PWM output mode: 6 - PWM toggle/set */
#define OUTMOD_7 (7*0x20u) /* PWM output mode: 7 - PWM reset/set */
#define CCIS_0 (0*0x1000u) /* Capture input select: 0 - CCIxA */
#define CCIS_1 (1*0x1000u) /* Capture input select: 1 - CCIxB */
#define CCIS_2 (2*0x1000u) /* Capture input select: 2 - GND */
#define CCIS_3 (3*0x1000u) /* Capture input select: 3 - Vcc */
#define CM_0 (0*0x4000u) /* Capture mode: 0 - disabled */
#define CM_1 (1*0x4000u) /* Capture mode: 1 - pos. edge */
#define CM_2 (2*0x4000u) /* Capture mode: 1 - neg. edge */
#define CM_3 (3*0x4000u) /* Capture mode: 1 - both edges */

TACTL|=MC_3;

TACTL|=MC1|MC0;

TACTL|=0x30;

TACTL_bit.TAMC = 3; // не проходит с msp430x21x1.h
TACTL|=MC1|MC0;  // не проходить с io430x21x1.h

struct b
{
    unsigned int number;           // число
    unsigned int bdcNumber[10];    // число, в двоично-десятичном представлении
    unsigned char rIdx;            // индекс чтения буфера
    unsigned char cntr;            // счетчик числа элементов в буфере
};

struct b buff, *pbuff = &buff;

        
void BDC (struct b *k)
{
    if (k->number < 9)
    {
        k->cntr = 0;
        k->bdcNumber[k->cntr] = k->number;  
    }
    else
    {
        for (k->cntr = 0; k->number > 9; (k->cntr)++)
        {
            k->bdcNumber[k->cntr] = k->number % 10;
            k->number /= 10;
        }
        k->bdcNumber[k->cntr] = k->number;
    }
}

k->bdcNumber[k->cntr] = k->number % 10;

k->bdcNumber[k->cntr] = k->number % 10;