void StartTrans0(void)
{
DisableReceive0;
SetBit(PORTA,1);
TrCount0=0;
GoTrans0;
}

void StartTrans1(void)
{
SetBit(PORTA,0);
TrCount1=0;
GoTrans1;
}


interrupt [USART0_DRE] void usart0_udre_isr(void)
{
if (TrCount0<cNumTrByte0-1)
{
UDR0=cmTrBuf0[TrCount0];
TrCount0++;
}
else
{
UDR0=cmTrBuf0[cNumTrByte0-1];
StopTrans0;
TrCount0=0;
FinTrans=1;
}
}

interrupt [USART0_TXC] void usart0_tx_isr(void)
{
if (TrCount0<cNumTrByte0-1)
{
StopTrans0;
FinTrans=1;
ClrBit(PORTA,1);
EnableReceive0;
}

interrupt [USART0_RXC] void usart0_rx_isr(void) // USART0 I?a?uaaiea i?eaiieea IANOA?A
{
char status;
status=UCSR0A;
if ((status & (FRAMING_ERROR | PARITY_ERROR | DATA_OVERRUN))==0)
{
if (StartRec0==0)
{
StartRec0=1;
RcCount0=0;
cmRcBuf0[RcCount0++]=UDR0;
TCCR1B=0x05;
TCNT1H=0xFF;
TCNT1L=0xEA;
}
else
{
cmRcBuf0[RcCount0++]=UDR0;
TCNT1H=0xFF;
TCNT1L=0xEA;
}
}
}

interrupt [USART1_RXC] void usart1_rx_isr(void)
{
char status,data;
status=UCSR1A;
data=UDR1;
if ((status & (FRAMING_ERROR | PARITY_ERROR | DATA_OVERRUN))==0)
{
if (StartRec1==0)
{
StartRec1=1;
RcCount1=0;
cmRcBuf1[RcCount1++]=data;
TCNT0=0xE9;
TCCR0=0x05;
}
else
{
if (RcCount1<MaxLenghtRecBuf1)
{
cmRcBuf1[RcCount1++]=data;
}
else
{
cmRcBuf1[MaxLenghtRecBuf1-1]=data;
}
TCNT0=0xE9;
}
}
}

interrupt [USART1_DRE] void usart1_udre_isr(void) // USART1 I?a?uaaiea ia?aaao?eea IIA?EIAIIIAI
{
if (TrCount1<cNumTrByte1+1)
{
UDR1=cmTrBuf1[TrCount1];
TrCount1++;
}
else
{
StopTrans1;
//ClrBit(DDRA,0);
ClrBit(PORTA,0); //PA0 a 0 - ?aaioa a?aeaa?a 485 ia i?eai
//EnableReceive1;
TrCount1=0;
}
}

interrupt [TIM0_OVF] void timer0_ovf_isr(void)
{

if (StartRec1==1)
{
StartRec1=0;
cNumRcByte1=RcCount1;
bModBus1=1;
TCCR0=0;
}
}

char ModBus0 (void)
{
int TempI;
if (cmRcBuf0[0]==0x01 && cmRcBuf0[1]==0x03 && cmRcBuf0[2]==0x02)
{
...
}
}

char ModBus2 (void)
{
switch (ModFlag)
{
case (1):
{
...
}
}
}


interrupt [TIM1_OVF] void timer1_ovf_isr(void)
{
if (StartRec0==1)
{
StartRec0=0;
cNumRcByte0=RcCount0;
bModBus0=1;
TCCR1B=0x00;
DisableReceive0;
}
else
{
TCCR1B=0x00;
TCNT2=0x00;
TCCR2=0x07;
DisableReceive0;
}
}

interrupt [TIM2_OVF] void timer2_ovf_isr(void)
{
TrCount0=0;
cNumTrByte0=ModBus2();
StartTrans0();
TCCR2=0x00;
}

char ModBus1 (char NumByte)
{
...
}
}


void main(void)
{
Setup();
StartUART0();
StartUART1();
SetBit(DDRD,0);SetBit(PORTD,0);
ClrBit(DDRD,1);ClrBit(PORTD,1);
SetBit(PORTA,1);
ClrBit(DDRB,2);ClrBit(PORTB,2);
SetBit(DDRB,3);SetBit(PORTB,3);
EnableReceive1;
ClrBit(PORTA,0);
TCCR2=0x07;
TCNT2=0x00;
#asm("sei")
while (1)
{
#asm("cli")
if (bModBus0==1)
{
ModBus0();
bModBus0=0;
TCNT2=0x00;
TCCR2=0x07;
}
if (bModBus1==1)
{
cNumTrByte1=ModBus1(cNumRcByte1);
if (cNumTrByte1!=0) StartTrans1();
bModBus1=0;
}
#asm("sei")
}
}

UCSR1B&=~(1<<4); UCSR1B&=~(1<<7)

UCSR1B|=(1<<4); UCSR1B|=(1<<7)

void Setup(void)
{
PORTB=0x04;
DDRB=0x00;
PORTD=0x01;
DDRD=0x00;
}