class BasePin
{
    public:
        virtual void On() = 0;
        virtual void Off() = 0;
        virtual void Cpl() = 0;
...
};

template<int port, int pin, char activestate = 'H'> class Pin;

template<int pin>
class Pin<1, pin>: public BasePin
{
    public:
        virtual void On() { P1OUT |= 1<<pin; }\
...
};

template<int pin>
class Pin<1, pin, 'L'>: public BasePin
{
    public:
        virtual void On(){ P1OUT &= ~(1<<pin); }
...
};

template<int port, int pin, char activestate = 'H'>
class Pin: public BasePin
{
    public:
        virtual void On() {
            if (port == 1) P1OUT |= 1<<pin;
            if (port == 2) P2OUT |= 1<<pin;
            if (port == 3) P3OUT |= 1<<pin;
            if (port == 4) P4OUT |= 1<<pin;
            if (port == 5) P5OUT |= 1<<pin;
        }
...
};

template<int port, int pin, char activestate = 'H'>
class Pin: public BasePin
{
    public:
        virtual void On() {P##portOUT |= 1<<pin; }
...
};

Pin<1, 2, 'L'> PIN12;
#define PIN_12 1, 2, L
Pin<2, 3> PIN23;
#define PIN_23 2, 3, H
...
    PIN12.On();
    on(PIN_12);
    PIN23.On();
    on(PIN_23);

    1808:    e2 c2 21 00     bic.b    #4,    &0x0021  ;r2 As==10
    180c:    e2 c2 21 00     bic.b    #4,    &0x0021  ;r2 As==10
    1810:    f2 d2 29 00     bis.b    #8,    &0x0029  ;r2 As==11
    1814:    f2 d2 29 00     bis.b    #8,    &0x0029  ;r2 As==11

template<int pin>
class Pin<1, pin, 'L'>: public BasePin

#ifndef USCIA_H__
#define USCIA_H__
#include    <io.h>

#ifndef USCIB_H__
enum usci_module_t { USCI0, USCI1 };
#endif


template <usci_module_t const module>
class uscia_t
{
public:
    class usca_ctl0_t    /* USCI Ax Control Register 0 */
    {
    public:
        uint8_t operator=(uint8_t value) { module ? UCA1CTL0 = value : UCA0CTL0 = value; return value; }
        void operator|=(uint8_t value) { module ? UCA1CTL0 |= value : UCA0CTL0 |= value; }
        void operator&=(uint8_t value) { module ? UCA1CTL0 &= value : UCA0CTL0 &= value; }
        operator uint8_t() { return module ? UCA1CTL0 : UCA0CTL0; }
    } static CTL0;
...
// pins
    class txd_bit
    {
    public:
        operator uint8_t() { return module ? (1 << 6) : (1 << 4); }
    }  static TXD_BIT;

    class rxd_bit
    {
    public:
        operator uint8_t() { return module ? (1 << 7) : (1 << 5); }
    }  static RXD_BIT;
};

template <usci_module_t module>
class uart_t
{
    typedef uscia_t<module> UCA;
public:
    static INLINE inline void init(uint32_t const divider);
....
};

template <usci_module_t module>
void uart_t<module>::init(uint32_t const divider)
{
    UCA::CTL1 |= (1  * UCSWRST);
    UCA::CTL1 = 0
        |(0 * UCRXEIE)|(0 * UCBRKIE)|(0 * UCTXADDR)
        |(1 * UCSWRST)
        |(1 * UCSSEL1)|(0 * UCSSEL0)
      ;
    UCA::CTL0 = (0 * UCPEN)|(0 * UCMSB)|(0 * UC7BIT)|(0 * UCSPB)|(0 * UCMODE1)|(0 * UCMODE0)|(0 * UCSYNC);

    UCA::BR0 = (divider / 16) & 0xFF;
    UCA::BR1 = (divider / 16) >> 8;
    UCA::MCTL = ((divider - (divider / 16) * 16) * UCBRF0)
        |(0 * UCBRS0)|(1 * UCOS16);
    UCA::CTL1 &= ~(1  * UCSWRST);
    P3SEL |= UCA::RXD_BIT | UCA::TXD_BIT;
    UCA::IFG |= UCA::TXIFG;
    UCA::IE |= UCA::RXIE;
}

enum uart_num_t {UART0, UART1};

class TBaseUart
{
private:
    static const int RxSize = 32;
    static const int TxSize = 32;
protected:
    bool tx_pending;
    RingBuf<RxSize> RxBuf;
    RingBuf<TxSize> TxBuf;
    virtual void write_tx_reg(char ch) = 0;
    virtual void disable_tx_interrupt() = 0;
    virtual void enable_tx_interrupt() = 0;
public:
    TBaseUart() : RxBuf(), TxBuf(), tx_pending(false) {}
    char getch(void) { return RxBuf.get(); }
    bool keypressed(void) { return RxBuf.count(); }
//    ... весь остальной полезный фарш
};

template<uart_num_t uart_num> class TUart;

template<>
class TUart<UART0> : public TBaseUart
{
private:
    void hw_init(uint32_t baudrate);
protected:
    virtual void write_tx_reg(char ch) { TXBUF0 = ch; }
    virtual void disable_tx_interrupt() { IE1 &= ~UTXIE0; }
    virtual void enable_tx_interrupt() { IE1 |= UTXIE0; }
public:
    TUart(uint32_t baudrate) : TBaseUart() { hw_init(baudrate); }
};

template<>
class TUart<UART1> : public TBaseUart
...

#define DECLARE_PORT(portN)                                                    \
template<int pin>                                                            \
class Pin<portN, pin>: public BasePin                                        \
{                                                                            \
    public:                                                                 \
        virtual void On() { P##portN##OUT |= 1<<pin; }                        \
...
};                                                                            \
                                                                            \
template<int pin>                                                            \
class Pin<portN, pin, 'L'>: public BasePin                                    \
{                                                                            \
    public:                                                                    \
        virtual void On(){ P##portN##OUT &= ~(1<<pin); }                    \
...
};                                                                            \

DECLARE_PORT(1)
DECLARE_PORT(2)
DECLARE_PORT(3)
DECLARE_PORT(4)
DECLARE_PORT(5)

    class dma_ctl_t    /* DMA channel x control */
    {
    public:
        uint16_t operator=(uint16_t value)
                {
                      channel == DMA0 ? DMA0CTL = value
                    : channel == DMA1 ? DMA1CTL = value
                    : DMA2CTL = value;
                    return value;
                }

    static uint8_t const RXIFG = module == USCI0 ? UCB0RXIFG : UCB1RXIFG;

template<>
class TUart<UART0> : public TBaseUart

class TUart0 : public TBaseUart

virtual void On() {
            if (port == 1) P1OUT |= 1<<pin;
            if (port == 2) P2OUT |= 1<<pin;
            if (port == 3) P3OUT |= 1<<pin;
            if (port == 4) P4OUT |= 1<<pin;
            if (port == 5) P5OUT |= 1<<pin;
        }

#define SPI         port1

#define RST_PIN     pin2
#define DI_PIN      pin3    // DI - вход мк, выход АЦП DO
#define RDY_PIN     pin5
#define CLK_PIN     pin6
#define DO_PIN      pin7    // DO - выход со стороны мк, вход АЦП DI

#define CLR_SCLK    SPI.out.CLK_PIN = 0
#define SET_SCLK    SPI.out.CLK_PIN = 1

class TUart1 : public TBaseUart
{
protected:
     virtual void write_tx_reg(char ch) { TXBUF0 = ch; }
...
};

class TUart2 : public TBaseUart
{
protected:
     virtual void write_tx_reg(char ch) { TXBUF1 = ch; }
};

template <usci_module_t module>
class uart_t: public uscia_t<module>
{
public:
     static INLINE inline void init(uint32_t const divider);
....
};

template <usci_module_t module>
void uart_t<module>::init(uint32_t const divider)
{
     CTL1 |= (1  * UCSWRST);
     CTL1 = 0
...
}

template <typename cs_pin>class adc_t
{
private:
    spi_t& spi;
    cs_pin CS;
    void select() { CS.On(); }
    void deselect() { CS.Off(); }
public:
    adc_t(spi_t& spi_ref): spi(spi_ref) { CS.Mode(OUTPUT); deselect(); }
}

typedef Pin<'A', 2, 'L'> adc_cs_t;
typedef adc_t<adc_cs_t> adc1_t;

adc1_t adc(spi2);

#define Req1      1, 0, L
#define Req2      1, 1, L
//...
#define ChipSel1  1, 7, L
#define ChipSel2  0, 5, L
//...
#include "ascold.h"
#include "pin.hpp"
Pin<ChipSel1> CS1;
Pin<ChipSel2> CS2;

Pin<Req1> RQ1;
Pin<Req2,OUTPUT_OK> RQ2;

int main()
{
on(ChipSel1);  // макрос Аскольда Волкова
CS1.On();       // гибрид на С++
}