#include <board.h>
#include <irq/irq.h>
#include <usart/usart.h>
#include <pmc/pmc.h>
#include "lcd.h"

volatile int uart_count_rx_irq;
//volatile int uart_count_rx_sim;

void InitFreq(void)
{
AT91C_BASE_MC->MC_FMR = AT91C_MC_FWS_1FWS ;
AT91C_BASE_WDTC->WDTC_WDMR= AT91C_WDTC_WDDIS;
AT91C_BASE_PMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x40 <<8) | AT91C_CKGR_MOSCEN ));
while(!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS));
AT91C_BASE_PMC->PMC_PLLR = AT91C_CKGR_USBDIV_1 | (16<<8) | (AT91C_CKGR_MUL & (72<<16)) | (AT91C_CKGR_DIV & 14);
while(!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK));
while(!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2 ;
while(!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK ;
while(!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
}

void InitPeriphery(void)
{
//enable the clock of the PIO
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOA;
//enable the clock of the PIO
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOB;

// BUTTON SW1, SW2
AT91C_BASE_PIOB->PIO_ODR |= BIT24 | BIT25; //Configure in Input
AT91C_BASE_PIOB->PIO_PER |= BIT24 | BIT25; //Enable PB24

//Joystick
AT91C_BASE_PIOB->PIO_ODR |= BIT7 | BIT8 | BIT9 | BIT14 | BIT15; //Configure in Input
AT91C_BASE_PIOB->PIO_PER |= BIT7 | BIT8 | BIT9 | BIT14 | BIT15; //Enable PB25
}

char U0ReadChar(void)
{
while(!(AT91C_BASE_US0->US_CSR & AT91C_US_RXRDY));
return (AT91C_BASE_US0->US_RHR & 0x1FF);
}

void U0WriteChar(char sym)
{
while(!(AT91C_BASE_US0->US_CSR & AT91C_US_TXRDY));
AT91C_BASE_US0->US_THR = sym & 0x1FF;
}

void U0_ISR(void)
{
unsigned int status;

status = AT91C_BASE_US0->US_CSR;

if ((status & AT91C_US_RXBUFF) == AT91C_US_RXRDY)
{
uart_count_rx_irq++;
U0WriteChar(U0ReadChar());
}
}

void U0Init(void)
{
unsigned int mode = AT91C_US_USMODE_NORMAL
| AT91C_US_CLKS_CLOCK
| AT91C_US_CHRL_8_BITS
| AT91C_US_PAR_NONE
| AT91C_US_NBSTOP_1_BIT
| AT91C_US_CHMODE_NORMAL;

//For UART0
AT91C_BASE_PIOA->PIO_PDR = BIT0 | BIT1 | BIT27 | BIT28;
AT91C_BASE_PIOA->PIO_ASR = BIT0 | BIT1 | BIT27 | BIT28;
AT91C_BASE_PIOA->PIO_BSR = 0;

// Enable the peripheral clock in the PMC
PMC_EnablePeripheral(AT91C_ID_US0);

//Disable Time Guard
AT91C_BASE_US0->US_TTGR = 0;

// Configure the USART in the desired mode @115200 bauds
USART_Configure(AT91C_BASE_US0, mode, 115200, BOARD_MCK);

// Configure the RXBUFF interrupt
IRQ_ConfigureIT(AT91C_ID_US0, 0, U0_ISR);

//Enable USART int
AT91C_BASE_US0->US_IER = AT91C_US_RXRDY;

//Enable AIC int
IRQ_EnableIT(AT91C_ID_US0);

// Enable receiver & transmitter
USART_SetTransmitterEnabled(AT91C_BASE_US0, 1);
USART_SetReceiverEnabled(AT91C_BASE_US0, 1);
}

void main()
{
InitFreq();
InitPeriphery();
U0Init();

InitSPI();
InitLCD();
Backlight(BKLGHT_LCD_ON);

while(1)
{
//Left SW
if(!((AT91C_BASE_PIOB->PIO_PDSR) & BIT24))
{
Backlight(BKLGHT_LCD_ON);
}
//Right SW
if(!((AT91C_BASE_PIOB->PIO_PDSR) & BIT25))
{
Backlight(BKLGHT_LCD_OFF);
}
//Joy Center
if(!((AT91C_BASE_PIOA->PIO_PDSR) & BIT15))
{
char tmp[] = "000";
tmp[2] = uart_count_rx_irq % 10 + '0';
tmp[1] = (uart_count_rx_irq / 10) % 10 + '0';
tmp[0] = (uart_count_rx_irq / 100) % 10 + '0';
LCDPutStr(tmp, 104, 0, LARGE, BLACK, WHITE);

tmp[2] = uart_count_rx_sim % 10 + '0';
tmp[1] = (uart_count_rx_sim / 10) % 10 + '0';
tmp[0] = (uart_count_rx_sim / 100) % 10 + '0';
LCDPutStr(tmp, 88, 0, LARGE, BLACK, WHITE);
}

// if(AT91C_BASE_US0->US_CSR & AT91C_US_RXRDY)
// {
// U0WriteChar(U0ReadChar());
// uart_count_rx_sim++;
// }

}
}

if ((status & AT91C_US_RXBUFF) == AT91C_US_RXRDY)

I_BIT                   EQU     0x80

mrs        r0, CPSR
bic        r0, r0, #I_BIT
msr        CPSR_c, r0

#include <intrinsics.h>

__enable_interrupt();

Mode_USR        EQU     0x10

;  Enter User Mode and set its Stack Pointer
                MSR     CPSR_c, #Mode_USR
                IF      :DEF:__MICROLIB

                EXPORT __initial_sp

                ELSE

                MOV     SP, R0
                SUB     SL, SP, #USR_Stack_Size

                ENDIF


; Enter the C code

                IMPORT  __main
                LDR     R0, =__main
                BX      R0

/*
IAR startup file for AT91SAM7X microcontrollers.
*/

MODULE ?cstartup

;; Forward declaration of sections.
SECTION IRQ_STACK:DATA:NOROOT(2)
SECTION CSTACK:DATA:NOROOT(3)

//------------------------------------------------------------------------------
// Headers
//------------------------------------------------------------------------------

#define __ASSEMBLY__
#include "board.h"

//------------------------------------------------------------------------------
// Definitions
//------------------------------------------------------------------------------

#define ARM_MODE_ABT 0x17
#define ARM_MODE_FIQ 0x11
#define ARM_MODE_IRQ 0x12
#define ARM_MODE_SVC 0x13
#define ARM_MODE_SYS 0x1F

#define I_BIT 0x80
#define F_BIT 0x40

//------------------------------------------------------------------------------
// Startup routine
//------------------------------------------------------------------------------

/*
Exception vectors
*/
SECTION .vectors:CODE:NOROOT(2)

PUBLIC resetVector
PUBLIC irqHandler

EXTERN Undefined_Handler
EXTERN SWI_Handler
EXTERN Prefetch_Handler
EXTERN Abort_Handler
EXTERN FIQ_Handler

ARM

__iar_init$$done: ; The interrupt vector is not needed
; until after copy initialization is done

resetVector:
; All default exception handlers (except reset) are
; defined as weak symbol definitions.
; If a handler is defined by the application it will take precedence.
LDR pc, =resetHandler ; Reset
LDR pc, Undefined_Addr ; Undefined instructions
LDR pc, SWI_Addr ; Software interrupt (SWI/SYS)
LDR pc, Prefetch_Addr ; Prefetch abort
LDR pc, Abort_Addr ; Data abort
B . ; RESERVED
LDR pc, =irqHandler ; IRQ
LDR pc, FIQ_Addr ; FIQ

Undefined_Addr: DCD Undefined_Handler
SWI_Addr: DCD SWI_Handler
Prefetch_Addr: DCD Prefetch_Handler
Abort_Addr: DCD Abort_Handler
FIQ_Addr: DCD FIQ_Handler

/*
Handles incoming interrupt requests by branching to the corresponding
handler, as defined in the AIC. Supports interrupt nesting.
*/
irqHandler:
/* Save interrupt context on the stack to allow nesting */
SUB lr, lr, #4
STMFD sp!, {lr}
MRS lr, SPSR
STMFD sp!, {r0, lr}

/* Write in the IVR to support Protect Mode */
LDR lr, =AT91C_BASE_AIC
LDR r0, [r14, #AIC_IVR]
STR lr, [r14, #AIC_IVR]

/* Branch to interrupt handler in Supervisor mode */
MSR CPSR_c, #ARM_MODE_SYS
STMFD sp!, {r1-r3, r4, r12, lr}
MOV lr, pc
BX r0
LDMIA sp!, {r1-r3, r4, r12, lr}
MSR CPSR_c, #ARM_MODE_IRQ | I_BIT

/* Acknowledge interrupt */
LDR lr, =AT91C_BASE_AIC
STR lr, [r14, #AIC_EOICR]

/* Restore interrupt context and branch back to calling code */
LDMIA sp!, {r0, lr}
MSR SPSR_cxsf, lr
LDMIA sp!, {pc}^


/*
After a reset, execution starts here, the mode is ARM, supervisor
with interrupts disabled.
Initializes the chip and branches to the main() function.
*/
SECTION .cstartup:CODE:NOROOT(2)

PUBLIC resetHandler
EXTERN LowLevelInit
EXTERN ?main
REQUIRE resetVector
ARM

resetHandler:

/* Set pc to actual code location (i.e. not in remap zone) */
LDR pc, =label

/* Perform low-level initialization of the chip using LowLevelInit() */
label:
LDR r0, =LowLevelInit
LDR r4, =SFE(CSTACK)
MOV sp, r4
MOV lr, pc
BX r0

/* Set up the interrupt stack pointer. */
MSR cpsr_c, #ARM_MODE_IRQ | I_BIT | F_BIT ; Change the mode
LDR sp, =SFE(IRQ_STACK)

/* Set up the SYS stack pointer. */
MSR cpsr_c, #ARM_MODE_SYS | F_BIT ; Change the mode
LDR sp, =SFE(CSTACK)

/* Branch to main() */
LDR r0, =?main
MOV lr, pc
BX r0

/* Loop indefinitely when program is finished */
loop4:
B loop4

END

if ((status & AT91C_US_RXBUFF) == AT91C_US_RXRDY)

int *pt = (int *)0;
int i = 13;
while(i--)
    printf("%08X -> %08X\n", pt, *pt++);

00000000 180C0603    STMNEDA    ip, {r0,r1,r9,r10}
00000004 180C0603    STMNEDA    ip, {r0,r1,r9,r10}
00000008 180C0603    STMNEDA    ip, {r0,r1,r9,r10}
0000000C 180C0603    STMNEDA    ip, {r0,r1,r9,r10}
00000010 180C0603    STMNEDA    ip, {r0,r1,r9,r10}
00000014 140A0502    STRNE    r0, [r10], #-&502
00000018 140A0502    STRNE    r0, [r10], #-&502
0000001C CC663319    STCGTL    p3, c3, [r6], #-&64!
00000020 E8F47ABD    LDMIA    r4!, {r0,r2-r5,r7,r9,r11-lr}^
00000024 E8F47ABD    LDMIA    r4!, {r0,r2-r5,r7,r9,r11-lr}^
00000028 E8F47ABD    LDMIA    r4!, {r0,r2-r5,r7,r9,r11-lr}^
0000002C E8F47ABD    LDMIA    r4!, {r0,r2-r5,r7,r9,r11-lr}^
00000030 E8F47ABD    LDMIA    r4!, {r0,r2-r5,r7,r9,r11-lr}^