#define _UART_TX 0x40
#define _CAN_TX 0x04
#define _9600bs 0x26
#define _RB1 0x02
#define TR_ON 0x02
#define _SPEN 0x80
#define _RCIE 0x20
#define _TXIE 0x10
#define _CREN 0x10
#define _RCIP 0x20
#define _T1CKPSV 0x00 // 1:1 Timer1 Prescale value
#define _TMR1CS0 0x00 // Internal clock (FOSC/4) = 4000000 Hz
#define _T1OSCEN1 0x08 // Timer1 Oscillator Enable
#define _REQCM 0xE0
#define _TRHPR 0x03
#define _RXMS0 0x20
#define _RXMS1 0x40
#define _NRTR 0x00
#define _R8B 0x08
#define _SJW2 0x40
#define _SEG2PHTS1 0x80
#define _SAM0 0x00
#define _SEG13 0x10
#define _PRSEG1 0x00
#define _PRSEG4 0x03
#define _WAKFIL0 0x00
#define _SEG23 0x02
#define _ENDRHI1 0x20
#define _EXIDEN 0x08
#define ALLMESS 0x00
#define _REQOPN 0xE0
#define _IPEN 0x80
#define _RXB0IF 0x01
#define _RXB1IF 0x02
#define _TXB0IE1 0x04
#define _RXB0IE1 0x01
#define _RXB1IE1 0x02
#define _TMR1IE 0x01
#define _GIE 0x80
#define _PEIE 0x40
#define _RXB0IF 0x01
#define _RXB1IF 0x02
#define _RXB0DBEN0 0x04
#define _RXFUL 0x80
#define _RXRTRRO 0x08
#define _ICDT0I 0x08
#define _TXB0IF 0x04
void interrupt isr_f() // unfortunaly
{

    /* CAN interrupts */
    /* receive */

        if((PIR3&_RXB0IF)&&(!(RXB0CON&_RXRTRRO))) // Receive Buffer 0 Interrupt
        {
            if(RXB0CON&_RXFUL)
            {
                CANRB0_isr();
                PORTB ^= _RB1;
            }
        }
        else
        {
            if((PIR3&_RXB1IF)&&(!(RXB1CON&_RXRTRRO))) // Receive Buffer 1 Interrupt
            {
                if(RXB1CON&_RXFUL)
                {
                    CANRB1_isr();
                }
            }
        }
        
    /* transmit */
    if((PIR3&_TXB0IF)&&(CANSTAT&_ICDT0I)) //Transmit Buffer 0 has completed transmission and TXB0 interrupt
    {
        CANTR_isr();
        PORTB ^= _RB1;    
    }

    
}

void ini_f()
{
    /* port directions: 1=input, 0=output */
    TRISA = INPUT_PORT;
    TRISB = INPUT_PORT;
    TRISC = INPUT_PORT;
    TRISC &= ~_UART_TX; // UART TX - output
    TRISB &= ~_CAN_TX; // CAN TX - output
    PORTB &= ~_CAN_TX; // output - low
    /* for debug only */
    TRISB &= ~_RB1; // debuging output
    PORTB &= ~_RB1;    // output low
    /* UART settings */
    staff = RCREG;
    SPBRG = _9600bs; // with 24 Mhz oscillator frequency
    TXSTA = TR_ON;
    RCSTA |=  _SPEN;
    PIE1 |= _RCIE; // Enables the USART receive interrupt
    PIE1 |= _TXIE; // Enables the USART transmit interrupt
    RCSTA |= _CREN; // Serial port enabled, Enable continuous receive, etc ....
    IPR1 |= _RCIP; // USART Receive Interrupt - High priority
    /* timer settings */
     T1CON = ( _T1CKPSV | _TMR1CS0 | _T1OSCEN1 ); // enable 8-bit mode
    /* CAN settings */
    CANCON = _REQCM; // configuration mode
    while(!(CANSTAT&0xE0)); // waiting
    TXB0CON |=  _TRHPR; // transmit high priority
    RXB0CON = _RXMS0; // Receive only valid messages with standard identifier
    RXB1CON = _RXMS1; // Receive only valid messages with extended identifier
    RXB0DLC = ( _NRTR | _R8B ); // RC Data Length = 8 bytes
    BRGCON1 |= _SJW2; // Synchronization Jump Width Time = 2 x TQ
    BRGCON2 = (_SEG2PHTS1 | _SEG13 | _PRSEG1); // Phase Segment 1 Time = 3 x TQ, Propagation Time = 1 x TQ
    BRGCON3 = (_WAKFIL0 | _SEG23); // Phase Segment 2 Time = 3 x TQ
    CIOCON = (_ENDRHI1); // // Enable Drive High
    /* CAN preconf */
    RXF0SIDL &= ~_EXIDEN; // Filter will only accept standard ID messages
    RXF1SIDL &= ~_EXIDEN; // Filter will only accept standard ID messages
    RXF2SIDL |= _EXIDEN; // Filter will only accept extended ID messages        
    RXF3SIDL |= _EXIDEN; // Filter will only accept extended ID messages
    RXF4SIDL |= _EXIDEN; // Filter will only accept extended ID messages
    RXF5SIDL |= _EXIDEN; // Filter will only accept extended ID messages
    RXM0SIDL = ALLMESS;
    RXM0SIDH = ALLMESS;
    RXM0EIDL = ALLMESS;
    RXM0EIDH = ALLMESS;
    CANCON &= ~(_REQOPN); // normal oprating
    while(CANSTAT&0xE0); // waiting    
    /* interrupt settings */
    RCON |= _IPEN; // Enable priority levels on interrupts
    /* for CAN */
    PIR3 &= ~_RXB0IF;
    PIR3 &= ~_RXB1IF;
    PIE3 = (_TXB0IE1 | _RXB0IE1 | _RXB1IE1);
    STATUS_R = IDLE_;
    /* for timer1 */
    PIE1 &= ~_TMR1IE; // Disables the TMR1 overflow interrupt
    /* global interrupt enable */
    INTCON |= (_GIE | _PEIE); // Enables all high priority interrupts and Enables all low priority peripheral interrupts
    /* for debug only */
    SRAM_pointer = (unsigned char *)RAM_pnt;
    n_b = 0;
    mes =0;
    CONT_R = 0;
    set_BRf = 1;
    connection = 0;
    curt = 0;
    upload();
}