for(i=0; i<614400; i++)
{
     data[i] = Buffer[i];
}

void fdct_and_quantization(SBYTE *data,float *fdtbl,SWORD *outdata)
{
int tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
int tmp10, tmp11, tmp12, tmp13;
int z1, z2, z3, z4, z5, z11, z13;
int *dataptr;
int datafloat[64];
int temp;
SBYTE ctr;
BYTE i;
for (i=0; i<64; i++)
datafloat[i] = data[i];

dataptr=datafloat;
for (ctr = 7; ctr >= 0; ctr--)
{
tmp0 = dataptr[0] + dataptr[7];
tmp7 = dataptr[0] - dataptr[7];
tmp1 = dataptr[1] + dataptr[6];
tmp6 = dataptr[1] - dataptr[6];
tmp2 = dataptr[2] + dataptr[5];
tmp5 = dataptr[2] - dataptr[5];
tmp3 = dataptr[3] + dataptr[4];
tmp4 = dataptr[3] - dataptr[4];

/* Even part */

tmp10 = tmp0 + tmp3; /* phase 2 */
tmp13 = tmp0 - tmp3;
tmp11 = tmp1 + tmp2;
tmp12 = tmp1 - tmp2;

dataptr[0] = tmp10 + tmp11; /* phase 3 */
dataptr[4] = tmp10 - tmp11;

z1 = (tmp12 + tmp13) * (0.707106781); /* c4 */
dataptr[2] = tmp13 + z1; /* phase 5 */
dataptr[6] = tmp13 - z1;

/* Odd part */

tmp10 = tmp4 + tmp5; /* phase 2 */
tmp11 = tmp5 + tmp6;
tmp12 = tmp6 + tmp7;

/* The rotator is modified from fig 4-8 to avoid extra negations. */
z5 = (tmp10 - tmp12) * (0.382683433); /* c6 */
z2 = ( 0.541196100) * tmp10 + z5; /* c2-c6 */
z4 = ( 1.306562965) * tmp12 + z5; /* c2+c6 */
z3 = tmp11 * ( 0.707106781); /* c4 */

z11 = tmp7 + z3; /* phase 5 */
z13 = tmp7 - z3;

dataptr[5] = z13 + z2; /* phase 6 */
dataptr[3] = z13 - z2;
dataptr[1] = z11 + z4;
dataptr[7] = z11 - z4;

dataptr += 8; /* advance pointer to next row */
}

dataptr = datafloat;
for (ctr = 7; ctr >= 0; ctr--)
{
tmp0 = dataptr[0] + dataptr[56];
tmp7 = dataptr[0] - dataptr[56];
tmp1 = dataptr[8] + dataptr[48];
tmp6 = dataptr[8] - dataptr[48];
tmp2 = dataptr[16] + dataptr[40];
tmp5 = dataptr[16] - dataptr[40];
tmp3 = dataptr[24] + dataptr[32];
tmp4 = dataptr[24] - dataptr[32];

/* Even part */

tmp10 = tmp0 + tmp3; /* phase 2 */
tmp13 = tmp0 - tmp3;
tmp11 = tmp1 + tmp2;
tmp12 = tmp1 - tmp2;

dataptr[0] = tmp10 + tmp11; /* phase 3 */
dataptr[32] = tmp10 - tmp11;

z1 = (tmp12 + tmp13) * ( 0.707106781); /* c4 */
dataptr[16] = tmp13 + z1; /* phase 5 */
dataptr[48] = tmp13 - z1;

/* Odd part */

tmp10 = tmp4 + tmp5; /* phase 2 */
tmp11 = tmp5 + tmp6;
tmp12 = tmp6 + tmp7;

/* The rotator is modified from fig 4-8 to avoid extra negations. */
z5 = (tmp10 - tmp12) * ( 0.382683433); /* c6 */
z2 = ( 0.541196100) * tmp10 + z5; /* c2-c6 */
z4 = ( 1.306562965) * tmp12 + z5; /* c2+c6 */
z3 = tmp11 * ( 0.707106781); /* c4 */

z11 = tmp7 + z3; /* phase 5 */
z13 = tmp7 - z3;

dataptr[40] = z13 + z2; /* phase 6 */
dataptr[24] = z13 - z2;
dataptr[8] = z11 + z4;
dataptr[56] = z11 - z4;

dataptr++; /* advance pointer to next column */
}

for (i = 0; i < 64; i++)
{
/* Apply the quantization and scaling factor */
outdata[i] = datafloat[i] * fdtbl[i];
}
}

Word          0    1    2    3    4
              0123 0123 0123 0123 0123
Source         ABC DEFG HIJK LMNO
Destination      A BCDE FGHI JKLM NO

FLASH 0x00000000 0x00020000
{
FLASH 0x00000000 0x00020000
{
start.o (startup, +First)
}
RAM 0x00200000 0x00008000
{
* (sram)
}
SDRAM 0x00300000 0x00800000
{
* (+RO, +RW, +ZI)
}
}

Load_region 0x20000000 0x2000000 {

Fixed_region 0x20000000 {
*(cstartup +First)
.ANY (+RO +RW +ZI)
}

Relocate_region 0x200000 0x4000 {
*.o (VECTOR, +First)
}

ARM_LIB_HEAP 0x21FFE000 EMPTY 0x1000 {
}

ARM_LIB_STACK 0x22000000 EMPTY -0x1000 {
}
}

Load_region 0x20000000 0x2000000 {

Fixed_region 0x20000000 {
*(cstartup +First)
.ANY (+RO +RW +ZI)
}

Relocate_region 0x200000 0x4000 {
*.o (VECTOR, +First)
}

SRAM1 0x300000 0x4000 {
* (sram)
}

ARM_LIB_HEAP 0x21FFE000 EMPTY 0x1000 {
}

ARM_LIB_STACK 0x22000000 EMPTY -0x1000 {
}
}

void InitMMU(unsigned int *pTranslationTable)
{
int i;
// Program the TTB
_writeTTB((unsigned int) pTranslationTable);
// Program the domain access register
_writeDomain(0xC0000000);

// Reset table entries
for (i = 0; i < 4096; ++i)
pTranslationTable[i] = 0;
// Program level 1 page table entry

pTranslationTable[0x3] =
(0x3 << 20) | // Physical Address
(1 << 10) | // Access in supervisor mode
(15 << 5) | // Domain
(1 << 4) |
(1 << 3) | // Cachable
0x2; // Set as 1 Mbyte section

/* SDRAM entire mapping */
for(i=0;i<64;i++)
pTranslationTable[0x200+i] =
((0x200+i) << 20) | // Physical Address
(1 << 10) | // Access in supervisor mode
(15 << 5) | // Domain
(1 << 4) |
(1 << 3) | // Cachable
0x2; // Set as 1 Mbyte section

pTranslationTable[0xFFF] =
(0xFFF << 20) | // Physical Address
(1 << 10) | // Access in supervisor mode
(15 << 5) | // Domain
(1 << 4) |
0x2; // Set as 1 Mbyte section

// Enable the MMU
CP15_EnableMMU();
}

int main(void)
{
CP15_Enable_I_Cache();
InitMMU((unsigned int *) 0x310000);