unit NAME;
interface
.......
implementation // !!!!!!!!!!!!!!!!!!!!!
......
end.

// прям в этой строчке протеус ругался и останавливал обмен, в железе же слейв был доступен, часики нет
DDR_USI |= ( 1 << PORT_USI_SCL ) | ( 1 << PORT_USI_SDA );

PORT_USI |= ( 1 << PORT_USI_SCL );
PORT_USI |= ( 1 << PORT_USI_SDA );
DDR_USI &= ~( 1 << PORT_USI_SDA );
USICR =
( 1 << USISIE ) |
( 0 << USIOIE ) |
( 1 << USIWM1 ) | ( 0 << USIWM0 ) |
( 1 << USICS1 ) | ( 0 << USICS0 ) | ( 0 << USICLK ) |
( 0 << USITC );
USISR = ( 1 << USI_START_COND_INT ) | ( 1 << USIOIF ) | ( 1 << USIPF ) | ( 1 << USIDC );

поменял немного, стало так:
PORT_USI |= (1<<PORT_USI_SCL);
PORT_USI |= (1<<PORT_USI_SDA);
DDR_USI |= (1<<PORT_USI_SCL);
DDR_USI &= ~(1<<PORT_USI_SDA);
USICR = (1<<USISIE)|(0<<USIOIE)|(1<<USIWM1)|(0<<USIWM0)|(1<<USICS1)|(0<<USICS0)|(0<<USICLK)|(0<<USITC);
USISR = 0xF0;

протеус ругаться вроде перестал, часики читаются, но слейв теперь не отдает ack(ну я так думаю)
ISR( USI_OVERFLOW_VECTOR )
{
switch ( overflowState )
{
case USI_SLAVE_CHECK_ADDRESS:
if ( ( USIDR == 0 ) || ( ( USIDR >> 1 ) == slaveAddress) ) // проверяем адрес
{
if ( USIDR & 0x01 )// read/write
{
overflowState = USI_SLAVE_SEND_DATA;
}else{
overflowState = USI_SLAVE_REQUEST_DATA; // ставим флаг получить данные, сюда попадаем
}
SET_USI_TO_SEND_ACK( ); //шлем ack
// сюда попадаем
}else{
SET_USI_TO_TWI_START_CONDITION_MODE( );
}
break;
case USI_SLAVE_REQUEST_DATA: // а блин вот сюда никогда больше не попадаем
overflowState = USI_SLAVE_GET_DATA_AND_SEND_ACK;
SET_USI_TO_READ_DATA( );
break;
}
}

SET_USI_TO_SEND_ACK( )
{
USIDR = 0;
DDR_USI |= ( 1 << PORT_USI_SDA );
USISR = ( 0 << USI_START_COND_INT ) | ( 1 << USIOIF ) | ( 1 << USIPF ) | ( 1 << USIDC )| ( 0x0E << USICNT0 );
}

ISR( USI_START_VECTOR )
{

overflowState = USI_SLAVE_CHECK_ADDRESS;

DDR_USI &= ~( 1 << PORT_USI_SDA );

while (
       // SCL his high
       ( PIN_USI & ( 1 << PIN_USI_SCL ) ) &&
       // and SDA is low
       !( ( PIN_USI & ( 1 << PIN_USI_SDA ) ) )
  );

  if ( !( PIN_USI & ( 1 << PIN_USI_SDA ) ) )
  {
    //  not stop
    USICR =
         ( 1 << USISIE ) |
         ( 1 << USIOIE ) |
         ( 1 << USIWM1 ) | ( 1 << USIWM0 ) |
         ( 1 << USICS1 ) | ( 0 << USICS0 ) | ( 0 << USICLK ) |
         ( 0 << USITC );
  }else{
    // stop
    USICR =
         ( 1 << USISIE ) |
         ( 0 << USIOIE ) |
         ( 1 << USIWM1 ) | ( 0 << USIWM0 ) |
         ( 1 << USICS1 ) | ( 0 << USICS0 ) | ( 0 << USICLK ) |
         ( 0 << USITC );
  }

  USISR =
       // clear interrupt flags and release SCL
       ( 1 << USI_START_COND_INT ) | ( 1 << USIOIF ) |
       ( 1 << USIPF ) |( 1 << USIDC ) |
       ( 0x0 << USICNT0);
}

__interrupt void USI_Start_Condition_ISR(void)
{
    unsigned char tmpUSISR;                                         // Temporary variable to store volatile
    tmpUSISR = USISR;                                               // Not necessary, but prevents warnings
// Set default starting conditions for new TWI package
    USI_TWI_Overflow_State = USI_SLAVE_CHECK_ADDRESS;
    DDR_USI  &= ~(1<<PORT_USI_SDA);                                 // Set SDA as input
    while ( (PIN_USI & (1<<PORT_USI_SCL)) & !(tmpUSISR & (1<<USIPF)) );   // Wait for SCL to go low to ensure the "Start Condition" has completed.
                                                                       // If a Stop condition arises then leave the interrupt to prevent waiting forever.
    USICR   =   (1<<USISIE)|(1<<USIOIE)|                            // Enable Overflow and Start Condition Interrupt. (Keep StartCondInt to detect RESTART)
                (1<<USIWM1)|(1<<USIWM0)|                            // Set USI in Two-wire mode.
                (1<<USICS1)|(0<<USICS0)|(0<<USICLK)|                // Shift Register Clock Source = External, positive edge
                (0<<USITC);
    USISR  =    (1<<USI_START_COND_INT)|(1<<USIOIF)|(1<<USIPF)|(1<<USIDC)|      // Clear flags
                (0x0<<USICNT0);                                     // Set USI to sample 8 bits i.e. count 16 external pin toggles.
}

while ( (PIN_USI & (1<<PORT_USI_SCL)) & !(tmpUSISR & (1<<USIPF)) );

S D0 A 00 A Sr D1 A 55 A 57 A 17 A 02 A 31 A 01 A 11 N P

    i2c_start();
    i2c_tx_addr( (0x26<<TWI_ADR_BITS) | (FALSE<<TWI_READ_BIT) );
    i2c_tx(0x41);
    i2c_stop();

  i2c_start();
  i2c_tx_addr( (0x68<<TWI_ADR_BITS) | (FALSE<<TWI_READ_BIT) );
  i2c_tx(0);

  i2c_start();
  i2c_tx_addr( (0x68<<TWI_ADR_BITS) | (TRUE<<TWI_READ_BIT) );
  rtc_var->seconds = i2c_rx(ACK);
  rtc_var->minutes = i2c_rx(ACK);
  rtc_var->hours =   i2c_rx(ACK);
  i2c_rx(ACK);
  rtc_var->day =   i2c_rx(ACK);
  rtc_var->month = i2c_rx(ACK);
  rtc_var->year =  i2c_rx(NOT_ACK);
  i2c_stop();

void i2c_tx(unsigned char byte)
{
  if(i2c_error)
    return;
  i2c_delay();
  TWDR = byte;
  TWCR = ((1<<TWINT)+(1<<TWEN));
  i2c_delay();
  if(TWSR != MTX_DATA_ACK)
    i2c_error=1;
}

unsigned char i2c_rx(unsigned char last_byte)
{
  if(i2c_error)
    return 0;
  i2c_delay();
  if(last_byte)        
    TWCR = ((1<<TWINT)+(1<<TWEN)+(1<<TWEA));  
  else
    TWCR=((1<<TWINT)|(1<<TWEN));  
  i2c_delay();
  if(((TWSR != MRX_DATA_NACK)&&(last_byte == NOT_ACK))&&(TWSR != MRX_DATA_ACK))
    i2c_error=1;
  return TWDR;
}